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AD9245BCP-65EB

Description
14-Bit, 20 MSPS/40 MSPS/65 MSPS/80 MSPS, 3 V A/D Converter
File Size660KB,32 Pages
ManufacturerADI
Websitehttps://www.analog.com
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AD9245BCP-65EB Overview

14-Bit, 20 MSPS/40 MSPS/65 MSPS/80 MSPS, 3 V A/D Converter

14-Bit, 20 MSPS/40 MSPS/65 MSPS/80 MSPS,
3 V A/D Converte
r
AD9245
FEATURES
Single 3 V supply operation (2.7 V to 3.6 V)
SNR = 72.7 dBc to Nyquist
SFDR = 83.0 dBc to Nyquist
Low power
366 mW at 80 MSPS
300 mW at 65 MSPS
165 mW at 40 MSPS
90 mW at 20 MSPS
Differential input with 500 MHz bandwidth
On-chip reference and sample-and-hold
DNL = ±0.5 LSB
Flexible analog input: 1 V p-p to 2 V p-p range
Offset binary or twos complement data format
Clock duty-cycle stabilizer
FUNCTIONAL BLOCK DIAGRAM
AVDD
DRVDD
AD9245
VIN+
SHA
VIN–
4
REFT
REFB
CORRECTION LOGIC
14
OUTPUT BUFFERS
D13 (MSB)
VREF
D0 (LSB)
SENSE
REF
SELECT
0.5V
CLOCK
DUTY CYCLE
STABILIZER
MODE
SELECT
03583-001
MDAC1
8-STAGE
1 1/2-BIT PIPELINE
16
A/D
3
A/D
OTR
APPLICATIONS
Medical imaging equipment
IF sampling in communications receivers
WCDMA, CDMA-One, CDMA-2000, and TDS-CDMA
Battery-powered instruments
Hand-held scopemeters
Spectrum analyzers
Power-sensitive military applications
AGND
CLK
PDWN
MODE DGND
Figure 1.
GENERAL DESCRIPTION
The AD9245 is a monolithic, single 3 V supply, 14-bit,
20 MSPS/40 MSPS/65 MSPS/80 MSPS analog-to-digital
converter (ADC) featuring a high performance sample-and-
hold amplifier (SHA) and voltage reference. The AD9245 uses a
multistage differential pipelined architecture with output error
correction logic to provide 14-bit accuracy and guarantee no
missing codes over the full operating temperature range.
The wide bandwidth, truly differential SHA allows a variety of
user-selectable input ranges and common modes, including
single-ended applications. It is suitable for multiplexed systems
that switch full-scale voltage levels in successive channels and
for sampling single-channel inputs at frequencies well beyond
the Nyquist rate. Combined with power and cost savings over
previously available analog-to-digital converters, the AD9245 is
suitable for applications in communications, imaging, and
medical ultrasound.
A single-ended clock input is used to control all internal con-
version cycles. A duty cycle stabilizer (DCS) compensates for
wide variations in the clock duty cycle while maintaining
excellent overall ADC performance. The digital output data is
presented in straight binary or twos complement formats. An
out-of-range (OTR) signal indicates an overflow condition that
can be used with the most significant bit to determine low or
high overflow. Fabricated on an advanced CMOS process, the
AD9245 is available in a 32-lead LFCSP and is specified over
the industrial temperature range (–40°C to +85°C).
PRODUCT HIGHLIGHTS
1. The AD9245 operates from a single 3 V power supply and
features a separate digital output driver supply to
accommodate 2.5 V and 3.3 V logic families.
2. The patented SHA input maintains excellent performance for
input frequencies up to 100 MHz and can be configured for
single-ended or differential operation.
3. The AD9245 is pin-compatible with the AD9215, AD9235,
and AD9236. This allows a simplified migration from 10 bits
to 14 bits and 20 MSPS to 80 MSPS.
4. The clock DCS maintains overall ADC performance over a
wide range of clock pulse widths.
5. The OTR output bit indicates when the signal is beyond the
selected input range.
Rev. D
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
© 2006 Analog Devices, Inc. All rights reserved.

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