570BBB000107DG datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > Passive components> oscillator> 570BBB000107DG

570BBB000107DG: DescriptionANY, I2C PROGRAMMABLE XO; CategoryPassive components oscillator; File Size562KB，36 Pages; ManufacturerSilicon Laboratories Inc; Environmental Compliance

Download Datasheet Parametric View All

570BBB000107DG Online Shopping

Suppliers	Part Number	Price	MOQ	In stock
	570BBB000107DG	-	-	View	Buy Now

570BBB000107DG Overview

ANY, I2C PROGRAMMABLE XO

570BBB000107DG Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Silicon Laboratories Inc
package instruction	ROHS COMPLIANT PACKAGE-8
Reach Compliance Code	compliant
Is Samacsys	N
Other features	ENABLE/DISABLE FUNCTION; TRAY
maximum descent time	0.35 ns
Frequency Adjustment - Mechanical	NO
frequency stability	100%
Manufacturer's serial number	SI570
Installation features	SURFACE MOUNT
Number of terminals	8
Maximum operating frequency	810 MHz
Minimum operating frequency	10 MHz
Nominal operating frequency	810 MHz
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Oscillator type	LVDS
Package body material	CERAMIC
Encapsulate equivalent code	LCC8,.2X.28,100
physical size	7.0mm x 5.0mm x 1.85mm
power supply	3.3 V
Certification status	Not Qualified
longest rise time	0.35 ns
Maximum slew rate	108 mA
Maximum supply voltage	3.63 V
Minimum supply voltage	2.97 V
Nominal supply voltage	3.3 V
surface mount	YES
maximum symmetry	55/45 %
Base Number Matches	1

Preview

Download Datasheet

View All

Si 5 7 0 / S i 5 7 1

10 MH

Features



1.4 G H

C P

ROGRAMMABLE

XO/VCXO

Any programmable output



frequencies from 10 to 945 MHz and

select frequencies to 1.4 GHz



C serial interface



3rd generation DSPLL

with superior



jitter performance



3x better frequency stability than



SAW-based oscillators

Internal fixed crystal frequency

ensures high reliability and low

aging

Available LVPECL, CMOS,

LVDS, and CML outputs

Industry-standard 5x7 mm

package

Pb-free/RoHS-compliant



1.8, 2.5, or 3.3 V supply

Si5602

Applications



Ordering Information:



SONET/SDH

xDSL

10 GbE LAN/WAN

ATE

High performance

instrumentation



Low-jitter clock generation



Optical modules



Clock and data recovery

See page 31.

Pin Assignments:

See page 30.

(Top View)

SDA

Description

The Si570 XO/Si571 VCXO utilizes Silicon Laboratories’ advanced DSPLL

circuitry to provide a low-jitter clock at any frequency. The Si570/Si571 are user-

programmable to any output frequency from 10 to 945 MHz and select frequencies

to 1400 MHz with <1 ppb resolution. The device is programmed via an I

C serial

interface. Unlike traditional XO/VCXOs where a different crystal is required for

each output frequency, the Si57x uses one fixed-frequency crystal and a DSPLL

clock synthesis IC to provide any-frequency operation. This IC-based approach

allows the crystal resonator to provide exceptional frequency stability and

reliability. In addition, DSPLL clock synthesis provides superior supply noise

rejection, simplifying the task of generating low-jitter clocks in noisy environments

typically found in communication systems.

CLK–

GND

SCL

CLK+

Functional Block Diagram

CLK-

CLK+

Si570

SDA

Fixed

Frequency

10-1400 MHz



DSPLL Clock

Synthesis

SDA

SCL

CLK–

Si571 only

ADC

GND

SCL

CLK+

GND

Si571

Si570/Si571

Rev. 1.6 6/18

Recommended Resources

Laptop audio output circuit TPA6010A4

Simple high voltage power supply

Two-arm rectifier module three-phase bridge rectifier circuit

Circuit diagram of a regulated power supply with an output of 1A and 3.3V using M5237L external transistors.

Backup power control circuit diagram

555 competition answering circuit

ARM for Beginners: :loveliness:...; 159寒江雪 Microcontroller MCU

【Altera】SPI Problem in Nios II: I recently used an L3G4200 gyroscope to communicate with an FPGA using the SPI bus and referring to Altera's application notes "SPI CORE" and "Nios". Now I use the HAL API provided by Altera.The alt_a...; q3ccn FPGA/CPLD

【Perf-V Evaluation】+ Construction and basic use of development environment (1): Pengfeng provides two development directions for users of Artix 7 FPGA development kit, one is to develop under Linux , and the other is to develop under Windows . For the former, you need to install ...; jinglixixi FPGA/CPLD

About rtems: Hello experts, who has the following two plugins? rtemscentre.javaxcomm and rtemscentre.mysqlconnectorjava...; 151724 Embedded System

Geek DIY: RFID thief builds a long-distance penetration weapon: This article uses the latest penetration tool Tastic RFID Thief and RFID induction cracking technology to gain access to some secure buildings. [/font][/color][/b] [/size][align=center][color=rgb(50, ...; 电机知多少 RF/Wirelessly

Has any engineer encountered this problem? Please give me some guidance.: [table=98%] [tr][td] F2812 programming verification error: Flash API error #40 [/td][/tr] [/table]...; haoge205 DSP and ARM Processors

Shortcut: S0 S1 S2 S3 S4 S5 S6 S7 S8 S9 SA SB SC SD SE SF SG SH SI SJ SK SL SM SN SO SP SQ SR SS ST SU SV SW SX SY SZ T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 TA TB TC TD TE TF TG TH TI TJ TK TL TM TN TO TP TQ TR TS TT TU TV TW TX TY TZ U0 U1 U2 U3 U4 U6 U7 U8 UA UB UC UD UE UF UG UH UI UJ UK UL UM UN UP UQ UR US UT UU UV UW UX UZ V0 V1 V2 V3 V4 V5 V6 V7 V8 V9 VA VB VC VD VE VF VG VH VI VJ VK VL VM VN VO VP VQ VR VS VT VU VV VW VX VY VZ W0 W1 W2 W3 W4 W5 W6 W7 W8 W9 WA WB WC WD WE WF WG WH WI WJ WK WL WM WN WO WP WR WS WT WU WV WW WY X0 X1 X2 X3 X4 X5 X7 X8 X9 XA XB XC XD XE XF XG XH XK XL XM XN XO XP XQ XR XS XT XU XV XW XX XY XZ Y0 Y1 Y2 Y4 Y5 Y6 Y9 YA YB YC YD YE YF YG YH YK YL YM YN YP YQ YR YS YT YX Z0 Z1 Z2 Z3 Z4 Z5 Z6 Z8 ZA ZB ZC ZD ZE ZF ZG ZH ZJ ZL ZM ZN ZP ZR ZS ZT ZU ZV ZW ZX ZY

Popular Components