570FBB000396DG datasheet, PDF - EEWORLD Datasheet

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570FBB000396DG: DescriptionOSC XO 250.0000MHZ LVDS SMD; CategoryPassive components oscillator; File Size562KB，36 Pages; ManufacturerSilicon Laboratories Inc; Environmental Compliance

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570FBB000396DG Overview

OSC XO 250.0000MHZ LVDS SMD

570FBB000396DG Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Silicon Laboratories Inc
package instruction	LCC8,.2X.28,100
Reach Compliance Code	compliant
Other features	ENABLE/DISABLE FUNCTION; TRAY
maximum descent time	0.35 ns
Frequency Adjustment - Mechanical	NO
frequency stability	100%
Manufacturer's serial number	SI570
Installation features	SURFACE MOUNT
Number of terminals	8
Maximum operating frequency	810 MHz
Minimum operating frequency	10 MHz
Nominal operating frequency	810 MHz
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Oscillator type	LVDS
Package body material	CERAMIC
Encapsulate equivalent code	LCC8,.2X.28,100
physical size	7.0mm x 5.0mm x 1.85mm
power supply	2.5 V
Certification status	Not Qualified
longest rise time	0.35 ns
Maximum slew rate	108 mA
Maximum supply voltage	2.75 V
Minimum supply voltage	2.25 V
Nominal supply voltage	2.5 V
surface mount	YES
maximum symmetry	55/45 %

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Si 5 7 0 / S i 5 7 1

10 MH

Features



1.4 G H

C P

ROGRAMMABLE

XO/VCXO

Any programmable output



frequencies from 10 to 945 MHz and

select frequencies to 1.4 GHz



C serial interface



3rd generation DSPLL

with superior



jitter performance



3x better frequency stability than



SAW-based oscillators

Internal fixed crystal frequency

ensures high reliability and low

aging

Available LVPECL, CMOS,

LVDS, and CML outputs

Industry-standard 5x7 mm

package

Pb-free/RoHS-compliant



1.8, 2.5, or 3.3 V supply

Si5602

Applications



Ordering Information:



SONET/SDH

xDSL

10 GbE LAN/WAN

ATE

High performance

instrumentation



Low-jitter clock generation



Optical modules



Clock and data recovery

See page 31.

Pin Assignments:

See page 30.

(Top View)

SDA

Description

The Si570 XO/Si571 VCXO utilizes Silicon Laboratories’ advanced DSPLL

circuitry to provide a low-jitter clock at any frequency. The Si570/Si571 are user-

programmable to any output frequency from 10 to 945 MHz and select frequencies

to 1400 MHz with <1 ppb resolution. The device is programmed via an I

C serial

interface. Unlike traditional XO/VCXOs where a different crystal is required for

each output frequency, the Si57x uses one fixed-frequency crystal and a DSPLL

clock synthesis IC to provide any-frequency operation. This IC-based approach

allows the crystal resonator to provide exceptional frequency stability and

reliability. In addition, DSPLL clock synthesis provides superior supply noise

rejection, simplifying the task of generating low-jitter clocks in noisy environments

typically found in communication systems.

CLK–

GND

SCL

CLK+

Functional Block Diagram

CLK-

CLK+

Si570

SDA

Fixed

Frequency

10-1400 MHz



DSPLL Clock

Synthesis

SDA

SCL

CLK–

Si571 only

ADC

GND

SCL

CLK+

GND

Si571

Si570/Si571

Rev. 1.6 6/18

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