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BUK7K32-100EX

Description
MOSFET 2N-CH 100V 29A LFPAK56
CategoryDiscrete semiconductor    The transistor   
File Size710KB,13 Pages
ManufacturerNexperia
Websitehttps://www.nexperia.com
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BUK7K32-100EX Overview

MOSFET 2N-CH 100V 29A LFPAK56

BUK7K32-100EX Parametric

Parameter NameAttribute value
Brand NameNexperia
MakerNexperia
package instructionSMALL OUTLINE, R-PDSO-G6
Contacts8
Manufacturer packaging codeSOT1205
Reach Compliance Codecompliant
Avalanche Energy Efficiency Rating (Eas)67 mJ
Shell connectionDRAIN
ConfigurationSEPARATE, 2 ELEMENTS WITH BUILT-IN DIODE
Minimum drain-source breakdown voltage100 V
Maximum drain current (ID)29 A
Maximum drain-source on-resistance0.0275 Ω
FET technologyMETAL-OXIDE SEMICONDUCTOR
JESD-30 codeR-PDSO-G6
Number of components2
Number of terminals6
Operating modeENHANCEMENT MODE
Package body materialPLASTIC/EPOXY
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Polarity/channel typeN-CHANNEL
Maximum pulsed drain current (IDM)116 A
GuidelineAEC-Q101; IEC-60134
surface mountYES
Terminal formGULL WING
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
transistor applicationsSWITCHING
Transistor component materialsSILICON
BUK7K32-100E
2 September 2015
Dual N-channel 100 V, 27.5 mΩ standard level MOSFET
Product data sheet
1. General description
Dual Standard level N-channel MOSFET in an LFPAK56D (Dual Power-SO8) package
using TrenchMOS technology. This product has been designed and qualified to AEC
Q101 standard for use in high performance automotive applications.
2. Features and benefits
Dual MOSFET
Q101 Compliant
Repetitive avalanche rated
Suitable for thermally demanding environments due to 175 °C rating
True standard level gate with V
GS(th)
rating of greater than 1 V at 175 °C
3. Applications
12 V, 24 V and 48 V Automotive systems
Motors, lamps and solenoid control
Transmission control
Ultra high performance power switching
4. Quick reference data
Table 1.
Symbol
V
DS
I
D
P
tot
R
DSon
Quick reference data
Parameter
drain-source voltage
drain current
total power dissipation
Conditions
T
j
≥ 25 °C; T
j
≤ 175 °C
V
GS
= 10 V; T
mb
= 25 °C;
Fig. 2
T
mb
= 25 °C;
Fig. 1
V
GS
= 10 V; I
D
= 5 A; T
j
= 25 °C;
Fig. 11
Min
-
-
-
Typ
-
-
-
Max
100
29
64
Unit
V
A
W
Static characteristics FET1 and FET2
drain-source on-state
resistance
gate-drain charge
-
21.5
27.5
Dynamic characteristics FET1 and FET2
Q
GD
I
D
= 5 A; V
DS
= 80 V; V
GS
= 10 V;
T
j
= 25 °C;
Fig. 13; Fig. 14
-
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