19-2595; Rev 0; 10/02
Quad LVDS Line Receiver with Flow-Through
Pinout and “In-Path” Fail-Safe
General Description
The MAX9173 quad low-voltage differential signaling
(LVDS) line receiver is ideal for applications requiring
high data rates, low power, and low noise. The
MAX9173 is guaranteed to receive data at speeds up
to 500Mbps (250MHz) over controlled-impedance
media of approximately 100Ω. The transmission media
can be printed circuit (PC) board traces or cables.
The MAX9173 accepts four LVDS differential inputs and
translates them to LVCMOS/LVTTL outputs. The
MAX9173 inputs are high impedance and require an
external termination resistor when used in a point-to-
point connection.
The device supports a wide common-mode input range
of 0.05V to V
CC
- 0.05V, allowing for ground potential
differences and common-mode noise between the dri-
ver and the receiver. A fail-safe feature sets the output
high when the inputs are open, or when the inputs are
undriven and shorted or undriven and parallel terminat-
ed. The EN and
EN
inputs control the high-impedance
outputs. The enables are common to all four receivers.
Inputs conform to the ANSI TIA/EIA-644 LVDS stan-
dard. The flow-through pinout simplifies board layout
and reduces crosstalk by separating the LVDS inputs
and LVCMOS/LVTTL outputs. The MAX9173 operates
from a single 3.3V supply, and is specified for opera-
tion from -40°C to +85°C. Refer to the MAX9121/
MAX9122 data sheet for lower jitter quad LVDS
receivers with parallel fail-safe. Refer to the MAX9123
data sheet for a quad LVDS line driver with flow-
through pinout.
The device is available in 16-pin TSSOP, SO, and
space-saving thin QFN packages.
Features
o
Accepts LVDS and LVPECL Inputs
o
Fully Compatible with DS90LV048A
o
Low 1.0mA (max) Disable Supply Current
o
In-Path Fail-Safe Circuitry
o
Flow-Through Pinout
Simplifies PC Board Layout
Reduces Crosstalk
o
o
o
o
Guaranteed 500Mbps Data Rate
400ps Pulse Skew (max)
Conforms to ANSI TIA/EIA-644 LVDS Standard
High-Impedance LVDS Inputs when Powered-Off
MAX9173
o
Available in Tiny 3mm x 3mm QFN Package
Ordering Information
PART
MAX9173EUE
MAX9173ESE
MAX9173ETE*
TEMP RANGE
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
PIN-PACKAGE
16 TSSOP
16 SO
16 Thin QFN-EP**
*Future
product. Contact factory for availability.
**EP
= Exposed pad.
Typical Operating Circuit
LVDS SIGNALS
MAX9173
MAX9123
Tx
100Ω
Rx
Applications
Digital Copiers
Laser Printers
Cellular Phone Base Stations
Network Switches/Routers
Backplane Interconnect
Clock Distribution
LCD Displays
Telecom Switching Equipment
Tx
100Ω
Rx
LVTTL/LVCMOS
DATA INPUTS
Tx
100Ω
Rx
LVTTL/LVCMOS
DATA OUTPUTS
Tx
100Ω
Rx
Pin Configurations and Functional Diagram appear at end of
data sheet.
100Ω SHIELDED TWISTED CABLE OR MICROSTRIP BOARD TRACES
________________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Quad LVDS Line Receiver with Flow-Through
Pinout and “In-Path” Fail-Safe
MAX9173
ABSOLUTE MAXIMUM RATINGS
V
CC
to GND ..........................................................-0.3V to +4.0V
IN_+, IN_- to GND .................................................-0.3V to +4.0V
OUT_, EN,
EN
to GND................................-0.3V to (V
CC
+ 0.3V)
Continuous Power Dissipation (T
A
= +70°C)
16-Pin TSSOP (derate 9.4mW/°C above T
A
= +70°C) ..755mW
16-Pin SO (derate 8.7mW/°C above T
A
= +70°C) ........696mW
16-Pin QFN (derate 14.7mW/°C above T
A
= +70°C) ..1177mW
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
ESD Protection (Human Body Model, IN_+, IN_-) ............±7.0kV
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(V
CC
= 3.0V to 3.6V, differential input voltage |V
ID
| = 0.1V to 1.2V, common-mode input voltage V
CM
= |V
ID
/2| to V
CC
- |V
ID
/2|, outputs
enabled, and T
A
= -40°C to +85°C. Typical values are at V
CC
= 3.3V, V
CM
= 1.2V, |V
ID
| = 0.2V, and T
A
= +25°C, unless otherwise
noted.) (Notes 1, 2)
PARAMETER
LVDS INPUTS (IN_+, IN_-)
Differential Input High Threshold
Differential Input Low Threshold
Input Current (Noninverting Input)
Power-Off Input Current
(Noninverting Input)
Input Current (Inverting Input)
Power-Off Input Current
(Inverting Input)
LVCMOS/LVTTL OUTPUTS (OUT_)
Output High Voltage (Table 1)
Output Low Voltage
Output Short-Circuit Current
Output High-Impedance Current
LOGIC INPUTS (EN,
EN)
Input High Voltage
Input Low Voltage
Input Current
Input Clamp Voltage
POWER SUPPLY
Supply Current
Disabled Supply Current
I
CC
I
CCZ
Inputs open
Disabled, inputs open
12
0.56
15
1.0
mA
mA
V
IH
V
IL
I
IN
V
CL
V
IN
= high or low
I
CL
= -18mA
2.0
0
-15
-0.88
V
CC
0.8
+15
-1.5
V
V
µA
V
V
OH
V
OL
I
OS
I
OZ
Open, undriven short, or
I
OH
= -4.0mA undriven parallel termination
V
ID
= 0
I
OL
= +4.0mA, V
ID
= -100mV
V
OUT_
= 0 (Note 3)
Disabled, V
OUT_
= 0 or V
CC
-45
-1
2.7
2.7
3.2
3.2
0.1
-77
0.25
-120
+1
V
mA
µA
V
V
TH
V
TL
I
IN_+
I
IN_+OFF
I
IN_-
I
IN_-OFF
Figure 1
V
IN_+
= 0 to 3.6V, V
IN_-
= 0 to 3.6V,
V
CC
= 0 or open (Figure 1)
Figure 1
V
IN_+
= 0 to 3.6V, V
IN_-
= 0 to 3.6V,
V
CC
= 0 or open, Figure 1
-100
+0.5
-0.5
-0.5
-0.5
-45
-45
-2.5
0
+5.0
0
-5
+0.5
+10
+0.5
0
mV
mV
µA
µA
µA
µA
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
2
_______________________________________________________________________________________
Quad LVDS Line Receiver with Flow-Through
Pinout and “In-Path” Fail-Safe
AC ELECTRICAL CHARACTERISTICS
(V
CC
= 3.0V to 3.6V, C
L
= 15pF, |V
ID
| = 0.2V, V
CM
= 1.2V, and T
A
= -40°C to +85°C. Typical values are at V
CC
= 3.3V and T
A
=
+25°C, unless otherwise noted.) (Notes 4–7)
PARAMETER
Differential Propagation Delay
High to Low
Differential Propagation Delay
Low to High
Differential Pulse Skew
|t
PHLD
- t
PLHD
|
Differential Channel-to-Channel
Skew
Differential Part-to-Part Skew
Rise Time
Fall Time
Disable Time High to Z
Disable Time Low to Z
Enable Time Z to High
Enable Time Z to Low
Maximum Operating Frequency
SYMBOL
t
PHLD
t
PLHD
t
SKD1
t
SKD2
t
SKD3
t
SKD4
t
TLH
t
THL
t
PHZ
t
PLZ
t
PZH
t
PZL
f
MAX
CONDITIONS
Figures 2 and 3
Figures 2 and 3
Figures 2 and 3 (Note 8)
Figures 2 and 3 (Note 9)
Figures 2 and 3 (Note 10)
Figures 2 and 3 (Note 11)
Figures 2 and 3
Figures 2 and 3
RL = 2kΩ, Figures 4 and 5
RL = 2kΩ, Figures 4 and 5
RL = 2kΩ, Figures 4 and 5
RL = 2kΩ, Figures 4 and 5
All channels switching (Note 12)
250
0.66
0.62
9.5
9.5
3
3
MIN
1.2
1.2
TYP
2.01
2.07
60
100
MAX
2.7
2.7
400
500
1
1.5
1.0
1.0
14
14
14
14
UNITS
ns
ns
ps
ps
ns
ns
ns
ns
ns
ns
ns
MHz
MAX9173
Current into a pin is defined as positive. Current out of a pin is defined as negative. All voltages are referenced to ground
except V
TH
, V
TL
, and V
ID
.
Note 2:
Devices are 100% production tested at T
A
= +25°C and are guaranteed by design for T
A
= -40°C to +85°C as specified.
Note 3:
Short only one output at a time. Do not exceed the absolute maximum junction temperature specification.
Note 4:
AC parameters are guaranteed by design and characterization.
Note 5:
C
L
includes scope probe and test jig capacitance.
Note 6:
Pulse generator output conditions: t
R
= t
F
< 1ns (0% to 100%), frequency = 250MHz, 50% duty cycle, V
OH
= 1.3V, V
OL
=
1.1V. High-impedance delay pulse generator output conditions: t
R
= t
F
<
3ns (0% to 100%), frequency = 1MHz, 50% duty
cycle, V
OH
= 3V and V
OL
= 0.
Note 7:
Propagation delay and differential pulse skew decrease when
|V
ID
|
is increased from 200mV to 400mV. Skew specifications
apply for 200mV
≤ |V
ID
| ≤
1.2V over the common-mode range V
CM
=
|V
ID
|/2
to V
CC
-
|V
ID
|/2.
Note 8:
t
SKD1
is the magnitude of the difference of differential propagation delays in a channel. t
SKD1
=
|t
PHLD
- t
PLHD
|.
Note 9:
t
SKD2
is the magnitude of the difference of the t
PLHD
or t
PHLD
of one channel and the t
PLHD
or t
PHLD
of any other channel
on the same part.
Note 10:
t
SKD3
is the magnitude of the difference of any differential propagation delays between parts operating over rated conditions
at the same V
CC
and within 5°C of each other.
Note 11:
t
SKD4
is the magnitude of the difference of any differential propagation delays between parts operating over rated conditions.
Note 12:
60% to 40% duty cycle, V
OL
= 0.4V (max), V
OH
= 2.7V (min), load = 15pF.
Note 1:
_______________________________________________________________________________________
3
Quad LVDS Line Receiver with Flow-Through
Pinout and “In-Path” Fail-Safe
MAX9173
Typical Operating Characteristics
(V
CC
= 3.3V, V
CM
= 1.2V, |V
ID
| = 0.2V, f = 100MHz, input rise and fall time = 1ns (0% to 100%), C
L
= 15pF, and T
A
= +25°C, unless
otherwise noted.) (Figures 2 and 3)
DIFFERENTIAL THRESHOLD VOLTAGE
vs. SUPPLY VOLTAGE
DIFFERENTIAL INPUT THRESHOLD VOLTAGE (mV)
MAX9173 toc02
MAX9173 toc03
SUPPLY CURRENT vs. FREQUENCY
90
80
SUPPLY CURRENT (mA)
70
60
50
40
30
20
10
0
0.01
0.1
1
10
100
1000
FREQUENCY (MHz)
ONE CHANNEL
SWITCHING
C
L
= 15pF
ALL CHANNELS
SWITCHING
MAX9173 toc01
SUPPLY CURRENT vs. TEMPERATURE
16
ALL INPUTS OPEN
15
SUPPLY CURRENT (mA)
14
13
12
11
10
9
8
-40
-15
10
35
60
85
TEMPERATURE (°C)
-35
100
-39
V
TH
-43
-47
V
TL
-51
-55
3.0
3.1
3.2
3.3
3.4
3.5
3.6
SUPPLY VOLTAGE (V)
OUTPUT SHORT-CIRCUIT CURRENT
vs. SUPPLY VOLTAGE
MAX9173 toc04
OUTPUT HIGH-IMPEDANCE CURRENT
vs. SUPPLY VOLTAGE
MAX9173 toc05
OUTPUT HIGH VOLTAGE
vs. SUPPLY VOLTAGE
3.6
OUTPUT HIGH VOLTAGE (V)
3.5
3.4
3.3
3.2
3.1
3.0
2.9
2.8
I
OH
= -4mA
MAX9173 toc06
-60
OUTPUT SHORT-CIRCUIT CURRENT (mA)
ALL INPUTS OPEN
-65
-70
-75
-80
-85
-90
-95
-100
3.0
3.1
3.2
3.3
3.4
3.5
-0.010
OUTPUT HIGH-IMPEDANCE CURRENT (nA)
EN = LOW, EN = HIGH, V
OUT
= 0
-0.015
3.7
-0.020
-0.025
-0.030
3.6
3.0
3.1
3.2
3.3
3.4
3.5
3.6
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
2.7
3.0
3.1
3.2
3.3
3.4
3.5
3.6
SUPPLY VOLTAGE (V)
OUTPUT LOW VOLTAGE
vs. SUPPLY VOLTAGE
MAX9173 toc07
DIFFERENTIAL PROPAGATION DELAY
vs. SUPPLY VOLTAGE
MAX9173 toc08
DIFFERENTIAL PROPAGATION DELAY
vs. TEMPERATURE
DIFFERENTIAL PROPAGATION DELAY (ns)
2.25
2.20
2.15
2.10
2.05
2.00
1.95
1.90
1.85
1.80
-40
-15
10
35
60
85
t
PHLD
t
PLHD
MAX9173 toc09
98
97
OUTPUT LOW VOLTAGE (mV)
96
95
94
93
92
91
90
89
88
3.0
3.1
3.2
3.3
3.4
3.5
I
OL
= 4mA
2.20
DIFFERENTIAL PROPAGATION DELAY (ns)
2.15
t
PLHD
2.10
2.05
2.00
1.95
1.90
2.30
t
PHLD
3.6
3.0
3.1
3.2
3.3
3.4
3.5
3.6
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
TEMPERATURE (°C)
4
_______________________________________________________________________________________
Quad LVDS Line Receiver with Flow-Through
Pinout and “In-Path” Fail-Safe
MAX9173
Typical Operating Characteristics (continued)
(V
CC
= 3.3V, V
CM
= 1.2V, |V
ID
| = 0.2V, f = 100MHz, input rise and fall time = 1ns (0% to 100%), C
L
= 15pF, and T
A
= +25°C, unless
otherwise noted.) (Figures 2 and 3)
DIFFERENTIAL PROPAGATION DELAY
vs. COMMON-MODE VOLTAGE
MAX9173 toc10
DIFFERENTIAL PROPAGATION DELAY
vs. DIFFERENTIAL INPUT VOLTAGE
MAX9173 toc11
DIFFERENTIAL PROPAGATION DELAY
vs. LOAD
3.0
2.9
2.8
2.7
2.6
2.5
2.4
2.3
2.2
2.1
2.0
1.9
1.8
1.7
10
20
DIFFERENTIAL PROPAGATION DELAY (ns)
MAX9173 toc12
2.7
DIFFERENTIAL PROPAGATION DELAY (ns)
2.6
2.5
2.4
2.3
2.2
2.1
2.0
1.9
1.8
0.1
0.6
1.1
1.6
2.1
2.6
t
PHLD
t
PLHD
2.40
DIFFERENTIAL PROPAGATION DELAY (ns)
2.35
2.30
2.25
2.20
2.15
2.10
2.05
2.00
1.95
1.90
0.1
0.3
0.5
0.7
0.9
1.1
t
PHLD
t
PLHD
t
PLHD
t
PHLD
3.1
30
LOAD (pF)
40
50
COMMON-MODE VOLTAGE (V)
DIFFERENTIAL INPUT VOLTAGE (V)
TRANSITION TIME vs. SUPPLY VOLTAGE
MAX9173 toc13
TRANSITION TIME vs. TEMPERATURE
MAX9173 toc14
TRANSITION TIME vs. LOAD
1800
TRANSITION TIME (ps)
1600
1400
1200
1000
800
600
400
t
THL
MAX9173 toc15
720
800
750
TRANSITION TIME (ps)
700
650
t
THL
600
550
500
450
t
TLH
2000
t
TLH
TRANSITION TIME (ps)
680
t
TLH
640
t
THL
600
560
3.0
3.1
3.2
3.3
3.4
3.5
3.6
SUPPLY VOLTAGE (V)
400
-40
-15
10
35
60
85
TEMPERATURE (°C)
10
20
30
LOAD (pF)
40
50
DIFFERENTIAL PULSE SKEW
vs. SUPPLY VOLTAGE
120
110
100
90
80
70
60
50
40
30
20
10
0
3.0
3.1
3.2
3.3
3.4
3.5
3.6
SUPPLY VOLTAGE (V)
MAX9173 toc16
DIFFERENTIAL PULSE SKEW
vs. INPUT TRANSITION TIME
f = 50MHz
DIFFERENTIAL PULSE SKEW (ps)
350
300
250
200
150
100
50
0
1.0
1.5
2.0
2.5
3.0
INPUT TRANSITION TIME (ns)
MAX9173 toc17
400
_______________________________________________________________________________________
DIFFERENTIAL PULSE SKEW (ps)
5
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