www.fairchildsemi.com
ILC6383
1-Cell to 3-Cell Boost DC-DC Converter with True
Load Disconnect, 3.3V, 5V or Adjustable Output
Features
•
•
•
•
•
•
•
•
•
•
•
•
Guaranteed start up in PWM at 0.9V input
Synchronous rectification requires no external diode
True load disconnect from battery input in shutdown
Up to 75mA at 3.3V and 40mA at 5V from 1V input
Up to 375mA at 3.3V and 300mA at 5V from 3V input
Peak efficiency > 90%
1µA battery input current in shutdown (with V
OUT
= 0V)
Internal Oscillator frequency: 300kHz to ±15%
ILC6383: Fixed 3.3V or 5V output
ILC6383-ADJ: Adjustable output to 6V maximum
Low battery detector with 100ms transient rejection delay
Powergood output flag when V
OUT
is in regulation
Description
The ILC6383 series of step-up DC-DC converters operate
from 1-cell to 3-cell input. They are direct replacement for
ILC6382, in applications where SYNC pin is not used. The
PFM or PWM operating mode is user selectable through
SEL pin connected to ground or left open, respectively. The
choice should be dependent upon the current to be delivered
to the load: PFM is recommended for input voltage higher
than 1.5V and loads below 100mA, while PWM is recom-
mended for more than 50mA load current and in noise sensi-
tive applications. In shutdown mode, the device allows true
load disconnect from battery input. Designed for wireless
communications applications, the oscillator frequency is set
at 300kHz with no harmonics at sub 20kHz audio band or at
455kHz IF band.
Internal synchronous rectification and externally selectable
PFM/PWM mode of operation allows the selection of the
best efficiency at light or full load. The ILC6383 is capable
of delivering 75mA at 3.3V output from a single cell input.
The ILC6383-XX offers 3.3V or 5V fixed output voltage
while the ILC6383-ADJ allows adjustable output voltage to
6V maximum. Output voltage accuracy is ±3.5% over full
operating temperature range.
Additional features include power good output (POK) and an
internal low battery detector with 100ms transient rejection
delay. The device will reject low battery input transients
under 100ms in duration. The ILC6383 series is available in
a space saving eight lead micro SOP (MSOP-8) package.
Applications
• Cellular Phones, Pagers
• Palmtops, PDAs and portable electronics
• High efficiency 1V step up converters
Typical Applications
C
IN
47µF
+
V
IN
1 to 3-cell
ON
OFF
L
1
15µH
2 V
IN
R5
3 LBI/SD
R6
4 SEL
LBO 6
POK 5
Low Battery
Detector Output
Power Good Output
GND 7
ILC6383-XX
L
X
V
OUT
8
+
47µF
C
OUT
V
OUT
V
IN
1 to 3-cell
ON
OFF
R6
4 SEL
V
FB
5
R2
CIN
47µF
+
L
1
15µH
2
R5
3 LBI/SD
LBO 6
V
IN
GND 7
ILC6383-ADJ
L
X
V
OUT
8
+
V
OUT
C
OUT
47µF
R1
MSOP-8
PWM
PFM
PWM
PFM
MSOP-8
V
OUT
= 1.25 (1+R1/R2)
Figure 1. ILC6383CIR-XX
Figure 2. ILC6383CIR-ADJ
REV. 1.2.6 6/13/02
ILC6383
PRODUCT SPECIFICATION
Pin Assignments
L
X
1
V
IN
2
LB/SD 3
SEL 4
MSOP
(TOP VIEW)
8 V
OUT
7 GND
6 LBO
5 POK
L
X
1
8 V
OUT
7 GND
6
5
MSOP
(TOP VIEW)
V
IN
2
LB/SD 3
SEL 4
LBO
V
FB
ILC6383CIR-XX
ILC6383CIR-ADJ
Pin Definitions
Pin Number
1
2
3
Pin Number
L
X
V
IN
LBI/SD
Pin Description
Inductor input
. Inductor L connected between this pin and the battery
Input Voltage
. Connect directly to battery
Low battery detect input and shutdown
. Low battery detect threshold is
set with this pin using a potential divider. If this pin is pulled to logic low
then the device will shutdown.
Select Input
. A low logic level signal applied to this pin selects PFM
operation mode. If the pin is left open or high logic level is applied, PWM
mode is selected.
Power Good Output
. This open drain output pin will go high when output
voltage is within regulation, 0.92*V
OUT(NOM)
< V
threshold
< 0.98*V
OUT(NOM)
4
SEL
5
POK
(ILC6383CIR-XX)
V
FB
Feedback Input
. This pin sets the adjustable output voltage via an
(ILC6383CIR-ADJ) external resistor divider network. The formula for choosing the resistors is
shown in the “Applications Information” section.
6
7
8
LBO
GND
V
OUT
This open drain output will go low if the battery voltage is below the low
battery threshold set at pin 3
Ground of the IC
. Connect this pin to the battery and system ground
Regulated output voltage
.
Absolute Maximum Ratings
(Note 1)
Parameter
Voltage on V
OUT
pin
Voltage on LBI, Sync, LBO, POK, V
FB
, L
X
and V
IN
pins
Peak switch current on L
X
pin
Current on LBO pin
Continuous total power dissipation at 85˚C
Short circuit current
Operating ambient temperature
Maximum junction temperature
Storage temperature
Lead temperature (soldering 10 sec.)
Package thermal resistance
θ
JA
Symbol
V
OUT
-
IL
X
I
SINK(LBO)
P
D
I
SC
T
A
T
J(MAX)
T
stg
Ratings
-0.3 to 7
-0.3 to 7
1
5
315
Internally protected
(1 sec. duration)
-40 to 85
150
-40 to 125
300
206
Units
V
V
A
mA
mW
A
°C
°C
°C
°C
°C/W
2
REV. 1.2.6 6/13/02
PRODUCT SPECIFICATION
ILC6383
Electrical Characteristics ILC6383CIR-33 in PFM Mode
(SEL in LOW State)
Unless otherwise specified, all limits are at V
IN
= V
LBI
= 2.0V, I
OUT
= 1mA and T
A
= 25°C, test circuit Figure 1.
BOLDFACE
type indicates limit that apply over the full operating temperature range. (Note 2)
Parameter
Output Voltage
Maximum Output
Current
Load Regulation
No Load Battery
Input Current
Efficiency
Symbol
V
OUT(nom)
I
OUT
∆
V
OUT
V
OUT
I
IN (no load)
η
I
OUT
= 0mA, V
IN
=V
LBI
=1.2V
I
OUT
= 20mA
250
88
µA
%
Conditions
1.5V < V
IN
< 2.4V,
1.5V < V
IN
< 2.4V
V
OUT
≥
0.96V
OUT(nom)
,
1mA < I
OUT
< 20mA
Min.
3.217
3.184
Typ.
3.3
150
1
Max.
3.382
3.415
Units
V
mA
%
Electrical Characteristics ILC6383CIR-33 in PWM Mode
Parameter
Output Voltage
Maximum Output
Current
Symbol
V
OUT
I
OUT
Conditions
1.5V < V
IN
< 2.4V,
1.5V < V
IN
< 2.4V
V
IN
= 1.2V, V
OUT
≥
0.96V
OUT(nom)
V
IN
= 2.0V, V
OUT
≥
0.96V
OUT(nom)
V
IN
= 2.4V, V
OUT
≥
0.96V
OUT(nom)
V
IN
= 3.0V, V
OUT
≥
0.96V
OUT(nom)
50mA < I
OUT
< 100mA
I
OUT
= 50mA
(SEL Open)
Unless otherwise specified, all limits are at V
IN
= V
LBI
= 2.0V, I
OUT
= 50mA and T
A
= 25°C, test circuit Figure 1.
BOLDFACE
type indicates limit that apply over the full operating temperature range. (Note 2)
Min.
3.217
3.184
Typ.
3.3
75
150
200
375
1
90
Max.
3.382
3.415
Units
V
mA
Load Regulation
Efficiency
∆
V
OUT
V
OUT
η
%
%
Electrical Characteristics ILC6383CIR-50 in PFM Mode
Parameter
Output Voltage
Maximum Output
Current
Load Regulation
No Load Battery
Input Current
Efficiency
Symbol
V
OUT(nom)
I
OUT
∆
V
OUT
V
OUT
I
IN (no load)
η
I
OUT
= 0mA, V
IN
=V
LBI
=1.5V
I
OUT
= 20mA
Conditions
1.5V < V
IN
< 3V,
1.5V < V
IN
< 3V
V
OUT
≥
0.96V
OUT(nom)
1mA < I
OUT
< 20mA
(SEL in LOW State)
Unless otherwise specified, all limits are at V
IN
= V
LBI
= 2.4V, I
OUT
= 1mA and T
A
= 25°C, test circuit Figure 1.
BOLDFACE
type indicates limit that apply over the full operating temperature range. (Note 2)
Min.
4.875
4.825
Typ.
5.0
150
1
550
90
Max.
5.125
5.175
Units
V
mA
%
µA
%
REV. 1.2.6 6/13/02
3
ILC6383
PRODUCT SPECIFICATION
(SEL Open)
Unless otherwise specified, all limits are at V
IN
= V
LBI
= 2.4V, I
OUT
= 50mA and T
A
= 25°C, test circuit Figure 1.
BOLDFACE
type indicates limit that apply over the full operating temperature range. (Note 2)
Parameter
Output Voltage
Maximum Output
Current
Symbol
V
OUT
I
OUT
Conditions
1.5V < V
IN
< 3V,
1.5V < V
IN
< 3V
V
IN
= 1.2V, V
OUT
≥
0.96V
OUT(nom)
V
IN
= 2.0V, V
OUT
≥
0.96V
OUT(nom)
V
IN
= 2.4V, V
OUT
≥
0.96V
OUT(nom)
V
IN
= 3.0V, V
OUT
≥
0.96V
OUT(nom)
1mA < I
OUT
< 50mA
I
OUT
= 50mA
Min.
4.875
4.825
Typ.
5.0
75
150
200
300
1
90
Max.
5.125
5.175
Units
V
mA
Electrical Characteristics ILC6383CIR-50 in PWM Mode
Load Regulation
Efficiency
∆
V
OUT
V
OUT
η
%
%
General Electrical Characteristics
Unless otherwise specified, all limits are at V
IN
= V
LBI
= 2.4V and T
A
= 25°C, test circuit figure 1 and figure 2 for.
ILC6383CIR-XX and ILC6383CIR-ADJ respectively. (Note 2)
Parameter
LBO Output Voltage
Low
LBO Output Leakage
Current
Shutdown Input
Voltage Low
Shutdown Input
Voltage High
SEL Input Voltage
High
SEL Input Voltage
Low
POK Output Voltage
Low
POK Output Voltage
High
POK Output Leakage
Current
POK Threshold
POK Hysteresis
Feedback Voltage
(ILC6383CIR-ADJ
only)
Output Voltage
Adjustment Range
(ILC6383CIR-ADJ
only)
Minimum Startup
Voltage
Symbol
V
LBO(low)
I
LBO(hi)
V
SD(low)
V
SD(hi)
V
SEL(hi)
V
SEL(low)
V
POK(low)
V
POK(hi)
I
L(POK)
V
TH(POK)
V
HYST
V
FB
1.225
1.212
6V at pin 5
0.92 x
V
OUT
0.95 x
V
OUT
50
1.250
1.275
1.288
I
SINK
= 2mA, open drain output
1
1.5
0.4
0.4
6
2
0.98 x V
OUT
Conditions
I
SINK
= 2mA, open drain output,
V
LBI
= 1V
V
LBO
= 5V
1
Min.
Typ.
Max.
0.4
2
0.4
6
Units
V
µA
V
V
V
V
V
V
µA
V
mV
V
V
OUT(ADJ) min
V
IN
= 0.9V, I
OUT
= 50mA
V
OUT(ADJ) max
V
IN
= 3V, I
OUT
= 50 mA
2.5V
6V
V
V
IN(start)
I
OUT
= 10mA, PWM mode
0.9
1
V
4
REV. 1.2.6 6/13/02
PRODUCT SPECIFICATION
ILC6383
General Electrical Characteristics
(continued)
Parameter
Input Voltage Range
Battery Input Current
in Load Disconnect
Mode
Switch on resistance
Oscillator Frequency
LBI Input Threshold
Input Leakage Current
LBI Hold Time
Symbol
V
IN
I
IN(SD)
Conditions
V
OUT
= V
OUT(nominal)
± 4%
I
OUT
= 10mA
V
LBI/SD
< 0.4V, V
OUT
= 0V
(short circuit)
N-Channel MOSFET
P-Channel MOSFET
255
1.175
1.150
Pins LB/SD, SEL and V
FB
,
(Note 3)
(Note 4)
100
120
Min.
0.9
1
1
Typ.
Max.
V
OUT(nominal)
+0.5V
10
Units
V
µA
R
ds(on)
f
OSC
V
REF
I LEAK
t
HOLD(LBI)
400
750
300
1.250
345
1.325
1.350
200
mΩ
kHz
nA
mS
Notes:
1. Absolute maximum ratings indicate limits which, when exceeded, may result in damage to the component. Electrical
specifications do not apply when operating the device outside its rated operating conditions.
2. Specified min/max limits are production tested or guaranteed through correlation based on statistical control methods.
Measurements are taken at constant junction temperature as close to ambient temperature as possible using low duty cycle
pulse testing.
3. Guaranteed by design.
4. In order to get a valid low-battery-output (LBO) signal, the input voltage must be lower than the low-battery-input (LBI)
threshold for a duration greater than the low battery hold time (t
HOLD(LBI)
). This feature eliminates false triggering due to
voltage transients at the battery terminal.
REV. 1.2.6 6/13/02
5
京公网安备 11010802033920号
EEWORLD
