93AA86BTISTG datasheet, PDF - EEWORLD Datasheet

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93AA86BTISTG: Description16K Microwire Compatible Serial EEPROM; File Size356KB，28 Pages; ManufacturerMicrochip; Websitehttps://www.microchip.com

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93AA86BTISTG Overview

16K Microwire Compatible Serial EEPROM

93AA86BTISTG Preview

93AA86A/B/C, 93LC86A/B/C,

93C86A/B/C

16K Microwire Compatible Serial EEPROM

Device Selection Table

Part Number

93AA86A

93AA86B

93LC86A

93LC86B

93C86A

93C86B

93AA86C

93LC86C

93C86C

Range

1.8-5.5

1.8-5-5

2.5-5.5

4.5-5.5

1.8-5.5

2.5-5.5

4.5-5.5

ORG Pin

Yes

PE Pin

Yes

Word Size

8-bit

16-bit

8-bit

16-bit

8-bit

16-bit

8 or 16-bit

Temp Ranges

I, E

Packages

P, SN, ST, MS, MC

Features:

•

Low-power CMOS technology

ORG pin to select word size for ‘86C’ version

2048 x 8-bit organization ‘A’ devices (no ORG)

1024 x 16-bit organization ‘B’ devices (no ORG)

Program Enable pin to write-protect the entire

array (‘86C’ version only)

Self-timed erase/write cycles (including

auto-erase)

Automatic ERAL before WRAL

Power-on/off data protection circuitry

Industry standard 3-wire serial I/O

Device Status signal (Ready/Busy)

Sequential read function

1,000,000 E/W cycles

Data retention > 200 years

Temperature ranges supported:

- Industrial (I)

-40°C to +85°C

- Automotive (E) -40°C to +125°C

Description:

The Microchip Technology Inc. 93XX86A/B/C devices

are 16K bit low-voltage serial Electrically Erasable

PROMs (EEPROM). Word-selectable devices such as

the 93XX86C are dependent upon external logic

levels driving the ORG pin to set word size. In the

SOT-23 package, the 93XX86A devices provide

dedicated 8-bit memory organization, while the

93XX86B devices provide dedicated 16-bit memory

organization. A Program Enable (PE) pin allows the

user to write-protect the entire memory array.

Advanced CMOS technology makes these devices

ideal for low-power, nonvolatile memory applications.

The entire 93XX Series is available in standard

packages including 8-lead PDIP and SOIC, and

advanced packaging including 8-lead MSOP, 6-lead

SOT-23, 8-lead 2x3 DFN and 8-lead TSSOP. Pb-free

(Pure Matte Sn) finish is available.

Package Types (not to scale)

PDIP/SOIC

(P, SN)

CLK

ORG

SOT-23

(OT)

CLK

Pin Function Table

Name

CLK

ORG

Chip Select

Serial Data Clock

Serial Data Input

Serial Data Output

Ground

Program Enable

Memory Configuration

Power Supply

Function

TSSOP/MSOP

(ST, MS)

CLK

ORG DO

DFN

(MC)

ORG

2005 Microchip Technology Inc.

DS21797G-page 1

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C

1.0

ELECTRICAL CHARACTERISTICS

Absolute Maximum Ratings

(†)

.............................................................................................................................................................................7.0V

All inputs and outputs w.r.t. V

......................................................................................................... -0.6V to V

+1.0V

Storage temperature ...............................................................................................................................-65°C to +150°C

Ambient temperature with power applied ................................................................................................-40°C to +125°C

ESD protection on all pins

......................................................................................................................................................≥

4 kV

†

NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the

device. This is a stress rating only and functional operation of the device at those or any other conditions above those

indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for

extended periods may affect device reliability.

TABLE 1-1:

DC CHARACTERISTICS

Industrial (I):

= -40°C to +85°C, V

= +1.8V to 5.5V

Automotive (E): T

= -40°C to +125°C, V

= +2.5V to 5.5V

Min

2.0

0.7 V

-0.3

—

2.4

- 0.2

—

Typ

—

500

—

100

—

Max

0.8

0.2 V

0.4

0.2

—

±1

—

500

—

Units

μA

Conditions

≥

2.7V

< 2.7V

≥

2.7V

< 2.7V

= 2.1 mA, V

= 4.5V

= 100

μA,

= 2.5V

= -400

μA,

= 4.5V

= -100

μA,

= 2.5V

= V

or V

OUT

= V

or V

OUT

= 0V

(Note 1)

= 25°C, F

CLK

= 1 MHz

CLK

= 3 MHz, V

= 5.5V

CLK

= 2 MHz, V

= 2.5V

CLK

= 3 MHz, V

= 5.5V

CLK

= 2 MHz, V

= 3.0V

CLK

= 2 MHz, V

= 2.5V

I – Temp

E – Temp

CLK = CS = 0V

ORG = DI

PE = V

or V

(Note 2) (Note 3)

(Note 1)

93AA86A/B/C, 93LC86A/B/C

93C86A/B/C

All parameters apply over the specified

ranges unless otherwise noted.

Param.

Symbol

No.

OUT

Parameter

High-level input voltage

Low-level input voltage

Low-level output voltage

High-level output voltage

Input leakage current

Output leakage current

Pin capacitance (all inputs/

outputs)

write Write current

read Read current

D10

CCS

Standby current

D11

POR

voltage detect

—

1.5

3.8

—

Note 1:

This parameter is periodically sampled and not 100% tested.

ORG and PE pin not available on ‘A’ or ‘B’ versions.

Ready/Busy status must be cleared from DO, see

Section 3.4 “Data Out (DO)”.

DS21797G-page 2

2005 Microchip Technology Inc.

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C

TABLE 1-2:

AC CHARACTERISTICS

Industrial (I):

= -40°C to +85°C, V

= +1.8V to 5.5V

Automotive (E): T

= -40°C to +125°C, V

= +2.5V to 5.5V

Min

—

Max

—

Units

MHz

Conditions

4.5V

≤

< 5.5V

2.5V

≤

< 4.5V

1.8V

≤

< 2.5V

4.5V

≤

< 5.5V

2.5V

≤

< 4.5V

1.8V

≤

< 2.5V

4.5V

≤

< 5.5V

2.5V

≤

< 4.5V

1.8V

≤

< 2.5V

4.5V

≤

< 5.5V

2.5V

≤

< 4.5V

1.8V

≤

< 2.5V

1.8V

≤

< 5.5V

1.8V

≤

< 5.5V

4.5V

≤

< 5.5V

2.5V

≤

< 4.5V

1.8V

≤

< 2.5V

4.5V

≤

< 5.5V

2.5V

≤

< 4.5V

1.8V

≤

< 2.5V

4.5V

≤

< 5.5V, CL = 100 pF

2.5V

≤

< 4.5V, CL = 100 pF

1.8V

≤

< 2.5V, CL = 100 pF

4.5V

≤

< 5.5V,

(Note 1)

1.8V

≤

< 4.5V,

(Note 1)

4.5V

≤

< 5.5V, CL = 100 pF

2.5V

≤

< 4.5V, CL = 100 pF

1.8V

≤

< 2.5V, CL = 100 pF

Erase/Write mode (AA and LC

versions)

Erase/Write mode

(93C versions)

ERAL mode, 4.5V

≤

5.5V

WRAL mode, 4.5V

≤

5.5V

All parameters apply over the specified

ranges unless otherwise noted.

Param.

Symbol

No.

CLK

Parameter

Clock frequency

CKH

Clock high time

200

250

450

100

200

450

100

250

100

250

100

250

—

CKL

Clock low time

—

CSS

Chip Select setup time

—

CSH

CSL

DIS

Chip Select hold time

Chip Select low time

Data input setup time

—

DIH

Data input hold time

—

Data output delay time

100

250

400

100

200

300

500

—

A10

A11

Data output disable time

Status valid time

—

A12

A13

A14

A15

A16

Note 1:

—

Program cycle time

—

Endurance

cycles 25°C, V

= 5.0V,

(Note 2)

This parameter is periodically sampled and not 100% tested.

This application is not tested but ensured by characterization. For endurance estimates in a specific

application, please consult the Total Endurance™ Model which may be obtained from Microchip’s web site

at www.microchip.com.

2005 Microchip Technology Inc.

DS21797G-page 3

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C

FIGURE 1-1:

CLK

DIS

(Read)

(Program)

Status Valid

is relative to CS.

DIH

CSS

CKH

CKL

CSH

SYNCHRONOUS DATA TIMING

Note:

TABLE 1-3: INSTRUCTION SET FOR X 16 ORGANIZATION (93XX86B OR 93XX86C WITH ORG =

Instruction

READ

EWEN

ERASE

ERAL

WRITE

WRAL

EWDS

Opcode

Address

A9 A8 A7 A6 A5 A4 A3 A2 A1 A0

Data In

—

D15-D0

—

Data Out

D15-D0

HighZ

(RDY/BSY)

High-Z

Req. CLK

Cycles

TABLE 1-4: INSTRUCTION SET FOR X 8 ORGANIZATION (93XX86A OR 93XX86C WITH ORG =

Instruction

READ

EWEN

ERASE

ERAL

WRITE

WRAL

EWDS

Opcode

Address

A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0

Data In

—

D7-D0

—

Data Out

D7-D0

High-Z

(RDY/BSY)

High-Z

Req. CLK

Cycles

DS21797G-page 4

2005 Microchip Technology Inc.

93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C

2.0

FUNCTIONAL DESCRIPTION

2.2

Data In/Data Out (DI/DO)

When the ORG pin (93XX86C) is connected to V

the (x16) organization is selected. When it is connected

to ground, the (x8) organization is selected. Instruc-

tions, addresses and write data are clocked into the DI

pin on the rising edge of the clock (CLK). The DO pin is

normally held in a High-Z state except when reading

data from the device, or when checking the Ready/

Busy status during a programming operation. The

Ready/Busy status can be verified during an Erase/

Write operation by polling the DO pin; DO low indicates

that programming is still in progress, while DO high

indicates the device is ready. DO will enter the High-Z

state on the falling edge of CS.

It is possible to connect the Data In and Data Out pins

together. However, with this configuration it is possible

for a “bus conflict” to occur during the “dummy zero”

that precedes the read operation, if A0 is a logic high

level. Under such a condition the voltage level seen at

Data Out is undefined and will depend upon the relative

impedances of Data Out and the signal source driving

A0. The higher the current sourcing capability of the

driver, the higher the voltage at the Data Out pin. In

order to limit this current, a resistor should be

connected between DI and DO.

2.3

Data Protection

2.1

Start Condition

The Start bit is detected by the device if CS and DI are

both high with respect to the positive edge of CLK for

the first time.

Before a Start condition is detected, CS, CLK and DI

may change in any combination (except to that of a

Start condition), without resulting in any device

operation (Read, Write, Erase, EWEN, EWDS, ERAL

or WRAL). As soon as CS is high, the device is no

longer in Standby mode.

An instruction following a Start condition will only be

executed if the required opcode, address and data bits

for any particular instruction are clocked in.

Note:

When preparing to transmit an instruction,

either the CLK or DI signal levels must be

at a logic low as CS is toggled active high.

All modes of operation are inhibited when V

is below

a typical voltage of 1.5V for ‘93AA’ and ‘93LC’ devices

or 3.8V for ‘93C’ devices.

The EWEN and EWDS commands give additional

protection against accidentally programming during

normal operation.

Note:

For added protection, an EWDS

command should be performed after

every write operation and an external 10

kΩ pull-down protection resistor should be

added to the CS pin.

After power-up the device is automatically in the EWDS

mode. Therefore, an

EWEN

instruction must be

performed before the initial

ERASE

WRITE

instruction

can be executed.

Note:

To prevent accidental writes to the array in

the 93XX86C devices, set the PE pin to a

logic low.

2005 Microchip Technology Inc.

DS21797G-page 5

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