EEWORLDEEWORLDEEWORLD

Part Number

Search

554FC000162DG

Description
VCXO; DIFF/SE; QUAD FREQ; 10-141
CategoryPassive components    oscillator   
File Size481KB,15 Pages
ManufacturerSilicon Laboratories Inc
Environmental Compliance
Download Datasheet Parametric View All

554FC000162DG Online Shopping

Suppliers Part Number Price MOQ In stock  
554FC000162DG - - View Buy Now

554FC000162DG Overview

VCXO; DIFF/SE; QUAD FREQ; 10-141

554FC000162DG Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerSilicon Laboratories Inc
package instructionROHS COMPLIANT PACKAGE-8
Reach Compliance Codecompliant
Other featuresENABLE/DISABLE FUNCTION; TRAY
Maximum control voltage2.5 V
Minimum control voltage
maximum descent time0.35 ns
Frequency Adjustment - MechanicalNO
Frequency offset/pull rate125 ppm
frequency stability50%
linearity10%
Manufacturer's serial numberSI554
Installation featuresSURFACE MOUNT
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Oscillator typeLVDS
physical size7.0mm x 5.0mm x 1.85mm
longest rise time0.35 ns
Maximum supply voltage2.75 V
Minimum supply voltage2.25 V
Nominal supply voltage2.5 V
surface mountYES
maximum symmetry55/45 %
Base Number Matches1
Si554
R
EVISION
D
Q
UAD
F
R E Q U E N C Y
V
O L TAG E
- C
O N T R O L L E D
C
RYSTAL
O
SCILLATOR
(VCXO) 10 MH
Z TO
1 . 4 G H
Z
Features
Available with any-rate output
frequencies from 10–945 MHz and
selected frequencies to 1.4 GHz
Four selectable output frequencies
3rd generation DSPLL
®
with superior
jitter performance
3x better frequency stability than
SAW-based oscillators
Internal fixed crystal frequency
ensures high reliability and low
aging
Available CMOS, LVPECL,
LVDS, and CML outputs
3.3, 2.5, and 1.8 V supply options
Industry-standard 5 x 7 mm
package and pinout
Pb-free/RoHS-compliant
Si5602
Applications
SONET/SDH
xDSL
10 GbE LAN / WAN
Ordering Information:
Low jitter clock generation
Optical modules
Clock and data recovery
See page 10.
Description
The Si554 quad-frequency VCXO utilizes Silicon Laboratories’ advanced
DSPLL
®
circuitry to provide a very low jitter clock for all output frequencies.
The Si554 is available with any-rate output frequency from 10 to 945 MHz
and selected frequencies to 1400 MHz. Unlike traditional VCXOs, where a
different crystal is required for each output frequency, the Si554 uses one
fixed crystal frequency to provide a wide range of output frequencies. This
IC-based approach allows the crystal resonator to provide exceptional
frequency stability and reliability. In addition, DSPLL clock synthesis
provides superior supply noise rejection, simplifying the task of generating
low jitter clocks in noisy environments typically found in communication
systems. The Si554 IC-based VCXO is factory-configurable for a wide
variety of user specifications including frequency, supply voltage, output
format, tuning slope, and temperature stability. Specific configurations are
factory-programmed at time of shipment, thereby eliminating the long lead
times associated with custom oscillators.
Pin Assignments:
See page 9.
(Top View)
FS[1]
7
V
C
1
2
3
8
FS[0]
6
5
4
V
DD
OE
GND
CLK–
CLK+
Functional Block Diagram
V
DD
CLK- CLK+
FS1
Fixed
Frequency XO
Any-rate
10–1400 MHz
DSPLL
®
Clock Synthesis
FS0
ADC
V
c
OE
GND
Rev. 1.2 6/18
Copyright © 2018 by Silicon Laboratories
Si554
It's graduation season again
As the college entrance examination is about to begin, the students who are about to enter the examination room will face a torment and test. For those of us who have already left the college entrance...
yijindz8 Talking
The parameters of the function definition are different!
I would like to ask why the function definition in the document is as follows: DWORD XXX_Init (LPCTSTR pContext, LPCVOID lpvBusContext) but I see the function definition as: HANDLE XXX_Init (DWOED dwc...
axiaoyeah Embedded System
About VCD Files
What are the benefits of VCD files? Why is the file format different? @000 00000100010110 11111001010101 00000010101000 00000101000101 11111010101001 11111101110001 How is this generated? The format i...
chunlei9924 FPGA/CPLD
Apple data cable plug
Apple data cable E75 C48 c68A Contact number 13602649221...
419203277 51mcu
【MicroPython】DAC usage
[b]基本用法[/b][code]from pyb import DACdac = DAC(1)# create DAC 1 on pin X5 dac.write(128)# write a value to the DAC (makes X5 1.65V)dac = DAC(1, bits=12)# use 12 bit resolution dac.write(4095)# output m...
dcexpert MicroPython Open Source section
Welcome all Beijing software and hardware engineers to join the "Embedded Technology Outsourcing Group"
Hello everyone! Welcome all Beijing software and hardware engineers to join the "Embedded Technology Outsourcing Group" Group number: 48348107 The group will release some outsourcing information from ...
fsao Embedded System

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 71  2043  1215  1787  2140  2  42  25  36  44 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号