Data Sheet
FEATURES
Conversion loss: 9 dB typical at 3 GHz to 9 GHz
Local oscillator (LO) to radio frequency (IF) isolation:
43 dB typical at 3 GHz to 9 GHz
RF to intermediate frequency (IF) isolation: 26 dB typical at
3 GHz to 9 GHz
Input third-order intercept (IP3): 24 dBm typical at
3 GHz to 9 GHz
Input 1 dB compression point (P1dB): 17 dBm typical at
3 GHz to 9 GHz
Input second-order intercept (IP2): 67 dBm typical at
3 GHz to 9 GHz
Passive double-balanced topology
Wide IF frequency range: dc to 4 GHz
12-terminal, ceramic, leadless chip carrier (LCC) package
GaAs, MMIC, Fundamental Mixer,
3 GHz to 10 GHz
HMC787A
FUNCTIONAL BLOCK DIAGRAM
NIC
12
NIC
11
GND
1
LO
2
HMC787A
NIC
10
9
8
7
GND
RF
GND
GND
3
GND
Figure 1.
APPLICATIONS
Microwave radio
Industrial, scientific, and medical (ISM) band and ultrawide
band (UWB) radio
Test equipment and sensors
Military end use
GENERAL DESCRIPTION
The
HMC787A
is a general-purpose, double balanced mixer in
a 12-terminal, RoHS compliant, ceramic leadless chip carrier
(LCC) package that can be used as an upconverter or down-
converter from 3 GHz to 10 GHz. This mixer is fabricated in a
gallium arsenide (GaAs), metal semiconductor field effect
transistor (MESFET) process and requires no external components
or matching circuitry.
The
HMC787A
provides excellent local oscillator (LO) to radio
frequency (RF) and LO to intermediate frequency (IF) isolation
due to optimized balun structures and operates with a LO drive
level of 17 dBm. The ceramic LCC package eliminates the need
for wire bonding and is compatible with high volume, surface-
mount manufacturing techniques.
Rev. C
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GND
PACKAGE
BASE
13608-001
4
5
6
IF
HMC787A
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings ............................................................ 4
Thermal Resistance ...................................................................... 4
ESD Caution .................................................................................. 4
Pin Configuration and Function Descriptions ............................. 5
Interface Schematics..................................................................... 5
Typical Performance Characteristics ............................................. 6
Data Sheet
Downconverter Performance ......................................................6
Upconverter Performance ......................................................... 10
Isolation and Return Loss Performance .................................. 12
Spurious and Harmonics Performance ................................... 14
Theory of Operation ...................................................................... 15
Applications Information .............................................................. 16
Typical Application Circuit ....................................................... 16
Evaluation PCB Information .................................................... 16
Outline Dimensions ....................................................................... 17
Ordering Guide .......................................................................... 17
REVISION HISTORY
9/2017—Rev. B to Rev. C
Changes to Table 4 ............................................................................ 5
5/2017—Rev. A to Rev. B
Changed E-12-1 to E-12-4............................................ Throughout
Change to Figure 1 ........................................................................... 1
Change to Figure 2 ........................................................................... 5
Updated Outline Dimensions ....................................................... 17
Changes to Ordering Guide .......................................................... 17
2/2017—Rev. 0 to Rev. A
Changes to Storage Temperature Range Parameter, Table 2....... 4
10/2016—Revision 0: Initial Version
Rev. C | Page 2 of 17
Data Sheet
SPECIFICATIONS
T
A
= 25°C, IF = 100 MHz, LO = 17 dBm, and all measurements performed as downconverter, unless otherwise noted.
Table 1.
Parameter
FREQUENCY RANGE
RF
LO
IF
LO DRIVE LEVEL
PERFORMANCE AT RF = 3 GHz to 9 GHz
Conversion Loss
Single Sideband (SSB) Noise Figure
Input Third-Order Intercept (IP3)
Input 1 dB Compression Point (P1dB)
Input Second-Order Intercept (IP2)
RF to IF Isolation
LO to RF Isolation
LO to IF Isolation
PERFORMANCE AT RF = 9 GHz to 10 GHz
Conversion Loss
SSB Noise Figure
Input IP3
Input P1dB
Input IP2
RF to IF Isolation
LO to RF Isolation
LO to IF Isolation
Min
3
3
DC
17
9
9
24
17
67
26
48
43
9
9
24
15
66
26
47
42
11
Typ
Max
10
10
4
HMC787A
Unit
GHz
GHz
GHz
dBm
dB
dB
dBm
dBm
dB
dB
dB
dB
dB
dB
dBm
dBm
dB
dB
dB
dB
15
15
35
11
15
15
25
Rev. C | Page 3 of 17
HMC787A
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter
RF Input Power
LO Input Power
IF Input Power
IF Source and Sink Current
Continuous Power Dissipation, P
DISS
(T
A
= 85°C, Derate 11.6 mW/°C Above 85°C)
Maximum Junction Temperature
Maximum Peak Reflow Temperature (MSL3)
1
Operating Temperature Range
Storage Temperature Range
Electrostatic Discharge (ESD) Sensitivity
Human Body Model (HBM)
Field Induced Charged Device Model
(FICDM)
1
Data Sheet
THERMAL RESISTANCE
Rating
28 dBm
28 dBm
28 dBm
12 mA
1044 mW
175°C
260°C
−40°C to +85°C
−65°C to +150°C
1500 V (Class 1C)
1000 V (Class C5)
Thermal performance is directly linked to printed circuit board
(PCB) design and operating environment. Careful attention to
PCB thermal design is required.
Table 3. Thermal Resistance
Package Type
E-12-4
1
1
θ
JA
120
θ
JC
86
Unit
°C/W
See JEDEC standard JESD51-2 for additional information on optimizing the
thermal impedance (PCB with 3 × 3 vias).
ESD CAUTION
See the Ordering Guide section.
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
Rev. C | Page 4 of 17
Data Sheet
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
NIC
NIC
12
11
10
HMC787A
NIC
GND
1
LO
2
GND
3
HMC787A
TOP VIEW
(Not to Scale)
9
8
7
GND
RF
GND
4
5
6
GND
NOTES
1. NIC = NOT INTERNALLY CONNECTED.
2. EXPOSED PAD. EXPOSED PAD MUST
BE CONNECTED TO RF/DC GROUND.
GND
PACKAGE
BASE
IF
Figure 2. Pin Configuration
Table 4. Pin Function Descriptions
Pin No.
1, 3, 4, 6, 7, 9
2
5
Mnemonic
GND
LO
IF
Description
Ground. Connect the package bottom to RF/dc ground. See Figure 3 for the GND interface schematic.
Local Oscillator. This pin is ac-coupled and matched to 50 Ω. See Figure 4 for the LO interface schematic.
Intermediate Frequency. This pin is dc-coupled. For applications not requiring operation to dc, externally
block this pin using a series capacitor whose value is chosen to pass the necessary IF frequency range. For
operation to dc, this pin must not source or sink more than 12 mA of current or device nonfunction and
possible device failure results. See for Figure 5 the IF interface schematic.
Radio Frequency. This pin is ac-coupled and matched to 50 Ω. See Figure 6 for the RF interface schematic.
Not Internally Connected.
Exposed Pad. Exposed pad must be connected to RF/dc ground.
8
10 to 12
RF
NIC
EPAD
INTERFACE SCHEMATICS
13608-003
Figure 3. GND Interface Schematic
LO
13608-004
Figure 5. IF Interface Schematic
RF
13608-006
Figure 4. LO Interface Schematic
Figure 6. RF Interface Schematic
Rev. C | Page 5 of 17
13608-005
GND
13608-002
IF
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