EEWORLDEEWORLDEEWORLD

Part Number

Search

SIT1602BI-73-18S-72.000000G

Description
-40 TO 85C, 2016, 50PPM, 1.8V, 7
CategoryPassive components   
File Size975KB,17 Pages
ManufacturerSiTime
Environmental Compliance
Download Datasheet View All

SIT1602BI-73-18S-72.000000G Overview

-40 TO 85C, 2016, 50PPM, 1.8V, 7

SiT1602B
Low Power, Standard Frequency Oscillator
Features
Applications
52 standard frequencies between 3.57 MHz and 77.76 MHz
100% pin-to-pin drop-in replacement to quartz-based XO
Excellent total frequency stability as low as ±20 ppm
Operating temperature from -40°C to 85°C. For 125°C and/or
-55°C options, refer to
SiT1618, SiT8918, SiT8920
Low power consumption of 3.5 mA typical at 1.8V
Standby mode for longer battery life
Fast startup time of 5 ms
LVCMOS/HCMOS compatible output
Industry-standard packages: 2.0 x 1.6, 2.5 x 2.0, 3.2 x 2.5,
5.0 x 3.2, 7.0 x 5.0 mm x mm
Instant samples with
Time Machine II
and
Field Programmable
Oscillators
Ideal for DSC, DVC, DVR, IP CAM, Tablets, e-Books,
SSD, GPON, EPON, etc
Ideal for high-speed serial protocols such as: USB,
SATA, SAS, Firewire, 100M / 1G / 10G Ethernet, etc.
RoHS and REACH compliant, Pb-free, Halogen-free and
Antimony-free
For AEC-Q100 oscillators, refer to
SiT8924
and
SiT8925
Electrical Characteristics
All Min and Max limits are specified over temperature and rated operating voltage with 15 pF output load unless otherwise
stated. Typical values are at 25°C and nominal supply voltage.
Table 1. Electrical Characteristics
Parameters
Output Frequency Range
Symbol
f
Min.
Typ.
Max.
Unit
Condition
Refer to
Table 13
for the exact list of supported frequencies
Frequency Range
52 standard frequencies between
MHz
3.57 MHz and 77.76 MHz
-20
-25
-50
-20
-40
1.62
2.25
2.52
2.7
2.97
2.25
45
90%
Frequency Stability
F_stab
Frequency Stability and Aging
+20
ppm
Inclusive of initial tolerance at 25°C, 1st year aging at 25°C,
and variations over operating temperature, rated power
+25
ppm
supply voltage and load.
+50
ppm
Operating Temperature Range
+70
°C
Extended Commercial
+85
°C
Industrial
Supply Voltage and Current Consumption
1.8
1.98
V
Contact
SiTime
for 1.5V support
2.5
2.75
V
2.8
3.08
V
3.0
3.3
V
3.3
3.63
V
3.63
V
3.8
4.5
mA
No load condition, f = 20 MHz, Vdd = 2.8V to 3.3V
3.7
4.2
mA
No load condition, f = 20 MHz, Vdd = 2.5V
3.5
4.1
mA
No load condition, f = 20 MHz, Vdd = 1.8V
4.2
mA
Vdd = 2.5V to 3.3V, OE = GND, Output in high-Z state
4.0
mA
Vdd = 1.8 V. OE = GND, Output in high-Z state
2.6
4.3
ST = GND, Vdd = 2.8V to 3.3V, Output is weakly pulled down
̅ ̅̅
A
1.4
2.5
ST = GND, Vdd = 2.5V, Output is weakly pulled down
̅ ̅̅
A
0.6
1.3
ST = GND, Vdd = 1.8V, Output is weakly pulled down
̅ ̅̅
A
LVCMOS Output Characteristics
1
1.3
55
2
2.5
2
%
ns
ns
ns
Vdd
All Vdds. See Duty Cycle definition in
Figure 3
and
Footnote 6
Vdd = 2.5V, 2.8V, 3.0V or 3.3V, 20% - 80%
Vdd =1.8V, 20% - 80%
Vdd = 2.25V - 3.63V, 20% - 80%
IOH = -4 mA (Vdd = 3.0V or 3.3V)
IOH = -3 mA (Vdd = 2.8V and Vdd = 2.5V)
IOH = -2 mA (Vdd = 1.8V)
IOL = 4 mA (Vdd = 3.0V or 3.3V)
IOL = 3 mA (Vdd = 2.8V and Vdd = 2.5V)
IOL = 2 mA (Vdd = 1.8V)
Operating Temperature Range
T_use
Supply Voltage
Vdd
Current Consumption
Idd
OE Disable Current
Standby Current
I_OD
I_std
Duty Cycle
Rise/Fall Time
DC
Tr, Tf
Output High Voltage
VOH
Output Low Voltage
VOL
10%
Vdd
Rev 1.04
January 30, 2018
www.sitime.com
[helper2416] The second part of the summary of GDB remote debugging skills of the helper2416 development board
[p=26, null, left][font=宋体][size=3][color=#ff00ff]1. Generate a debuggable program[/color][/size][/font][/p][p=26, null, left][font=宋体][size=3][color=#ff00ff]For example, a source file: main.cpp[/colo...
陌路绝途 Embedded System
ADF4158 write timing cannot respond
[i=s]This post was last edited by 285062025 on 2014-10-16 15:42[/i] The program for writing the timing of the control lines SPI_CS SPI_CLK SPI_MOSI connected to ADF4158 for debugging ADF5148 is: void ...
285062025 ADI Reference Circuit
Lwip raw api application problem without operating system
I am currently using FPGA to do network experiments and testing the performance of lwip in raw mode. S3e 500 board, mb core + xilkernel4.0 + lwip130, has been tuned, ping function, tcp and udp data tr...
pocker5200 Embedded System
Quartus adds phase-locked loop problem
There are not three phase-locked loops? The hint is that there are two, and there are only two input clocks, so two phase-locked loops are used, and the other one is not used?...
tianma123 FPGA/CPLD
mega16 assembly
mega16 assembly...
ahshan MCU
Newcomer Registration
Newcomer Registration...
东海扬尘 TI Technology Forum

Technical ResourceMore

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 2839  1194  1964  506  80  58  25  40  11  2 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号