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74HC27PW,112

Description
NOR Gate 3-Element 3-IN CMOS 14-Pin TSSOP Bulk
File Size740KB,16 Pages
ManufacturerNexperia
Websitehttps://www.nexperia.com
Download Datasheet Parametric Compare View All

74HC27PW,112 Overview

NOR Gate 3-Element 3-IN CMOS 14-Pin TSSOP Bulk

74HC27PW,112 Parametric

Parameter NameAttribute value
EU restricts the use of certain hazardous substancesCompliant
ECCN (US)EAR99
Part StatusLTB
HTS8542.39.00.01
Logic FamilyHC
Logic FunctionNOR
Number of Elements per Chip3
Number of Element Inputs3-IN
Number of Output Enables per Element0
Number of Selection Inputs per Element0
Number of Element Outputs1
Maximum Propagation Delay Time @ Maximum CL (ns)90@2V|18@4.5V|15@6V
Absolute Propagation Delay Time (ns)135
Process TechnologyCMOS
Maximum Low Level Output Current (mA)5.2
Maximum High Level Output Current (mA)-5.2
Minimum Operating Supply Voltage (V)2
Typical Operating Supply Voltage (V)5
Maximum Operating Supply Voltage (V)6
Maximum Quiescent Current (uA)2
Propagation Delay Test Condition (pF)50
Minimum Operating Temperature (°C)-40
Maximum Operating Temperature (°C)125
PackagingBulk
Supplier PackageTSSOP
Pin Count14
MountingSurface Mount
Package Height0.95(Max)
Package Length5.1(Max)
Package Width4.5(Max)
PCB changed14
74HC27; 74HCT27
Triple 3-input NOR gate
Rev. 5.1 — 27 November 2015
Product data sheet
1. General description
The 74HC27; 74HCT27 is a triple 3-input NOR gate. Inputs include clamp diodes. This
enables the use of current limiting resistors to interface inputs to voltages in excess of
V
CC
.
2. Features and benefits
Complies with JEDEC standard no. 7A
Input levels:
For 74HC27: CMOS level
For 74HCT27: TTL level
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from
40 C
to +85
C
and from
40 C
to +125
C
3. Ordering information
Table 1.
Ordering information
Temperature range Name
74HC27D
74HCT27D
74HC27DB
74HCT27DB
74HC27PW
74HCT27PW
74HC27BQ
74HCT27BQ
40 C
to +125
C
40 C
to +125
C
TSSOP14
40 C
to +125
C
SSOP14
plastic shrink small outline package; 14 leads; body width
5.3 mm
plastic thin shrink small outline package; 14 leads; body
width 4.4 mm
SOT337-1
SOT402-1
SOT762-1
40 C
to +125
C
SO14
Description
Version
Type number Package
plastic small outline package; 14 leads; body width 3.9 mm SOT108-1
DHVQFN14 plastic dual in-line compatible thermal enhanced very thin
quad flat package; no leads; 14 terminals;
body 2.5
3
0.85 mm

74HC27PW,112 Related Products

74HC27PW,112 74HC27PW,118
Description NOR Gate 3-Element 3-IN CMOS 14-Pin TSSOP Bulk NOR Gate 3-Element 3-IN CMOS 14-Pin TSSOP T/R
EU restricts the use of certain hazardous substances Compliant Compliant
ECCN (US) EAR99 EAR99
Part Status LTB Active
HTS 8542.39.00.01 8542.39.00.01
Logic Family HC HC
Logic Function NOR NOR
Number of Elements per Chip 3 3
Number of Element Inputs 3-IN 3-IN
Number of Element Outputs 1 1
Maximum Propagation Delay Time @ Maximum CL (ns) 90@2V|18@4.5V|15@6V 90@2V|18@4.5V|15@6V
Absolute Propagation Delay Time (ns) 135 135
Process Technology CMOS CMOS
Maximum Low Level Output Current (mA) 5.2 5.2
Maximum High Level Output Current (mA) -5.2 -5.2
Minimum Operating Supply Voltage (V) 2 2
Typical Operating Supply Voltage (V) 5 5
Maximum Operating Supply Voltage (V) 6 6
Maximum Quiescent Current (uA) 2 2
Propagation Delay Test Condition (pF) 50 50
Minimum Operating Temperature (°C) -40 -40
Maximum Operating Temperature (°C) 125 125
Packaging Bulk Tape and Reel
Supplier Package TSSOP TSSOP
Pin Count 14 14
Mounting Surface Mount Surface Mount
Package Height 0.95(Max) 0.95(Max)
Package Length 5.1(Max) 5.1(Max)
Package Width 4.5(Max) 4.5(Max)
PCB changed 14 14

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Index Files: 1333  2736  1309  2859  1975  27  56  58  40  33 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
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