Datasheet
Power Supply IC Series for TFT-LCD Panels
Gamma voltage generated IC
with built-in DAC
BD81010MUV
General Description
The feature of gamma voltage generated IC
BD81010MUV provides a single-chip solution with a
high-precision 10-bit DAC setting controlled by I
2
C serial
communications interface, a buffer amp (14ch), and a
operational amplifier for HVDD (1ch).
Key Specifications
Power Supply Voltage Range(VDD):
2.1V to 3.6V
Power Supply Voltage Range(VCC): 8.0V to 18.0V
Operating Temperature Range:
-40°C to +85°C
Package
Features
Single-chip Design means Fewer Components
Built in 10bit DAC (14ch)
Built in DAC Output Buffer Amplifier (14ch)
Built in Operation Amplifier (1ch) for HVDD
I
2
C Interface ( SDA, SCL )
Thermal Shutdown Circuit
Under-voltage Lockout Protection Circuit
Power ON Reset Circuit
Input Tolerant ( SDA, SCL, EN )
W(Typ) x D(Typ) x H(Max)
VQFN032V5050
5.00mm x 5.00mm x 1.00mm
Applications
It may be used with TFT-LCD panels, such as big screen
and high resolution LCD televisions.
○Product
structure：Silicon monolithic integrated circuit
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© 2016 ROHM Co., Ltd. All rights reserved.
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○This
product has no designed protection against radioactive rays
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BD81010MUV
Block Diagram
VCC
24
DACGND
23
22
VDAC
REFIN
21
FB
20
VDD
19
DACGND
18
VCC
17
VCC
VDD
GND 25
REFIN
×3
DAC
REFIN
×3
DAC
REFIN
×3
DAC
REFIN
×3
DAC
REFIN
×3
DAC
REFIN
×3
DAC
REFIN
×3
DAC
VDD
UVLO
(VCC, REFIN, VDD)
16 GND
REFIN
DAC
REFIN
DAC
REFIN
DAC
REFIN
Serial
I/F
DAC
REFIN
DAC
REFIN
DAC
REFIN
DAC
×3
×3
×3
×3
×3
×3
×3
VCC
OUT13 26
VCC
15 OUT0
VCC
OUT12 27
VCC
14 OUT1
VCC
OUT11 28
VCC
13 OUT2
VCC
OUT10 29
VCC
12 OUT3
VCC
OUT9 30
VCC
11 OUT4
VCC
OUT8 31
VCC
10 OUT5
VCC
OUT7 32
VCC
9
OUT6
VREF
Power ON
Reset
VCC
TSD
OP-AMP
1
EN
2
DGND
3
VDD
4
SDA
5
SCL
6
INP
7
INN
8
HVDD
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BD81010MUV
Pin Configuration
TOP VIEW
24 23 22 21 20 19 18 17
25
26
27
28
29
30
31
32
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
Pin Description
PIN
No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Pin name
EN
DGND
VDD
SDA
SCL
INP
INN
HVDD
OUT6
OUT5
OUT4
OUT3
OUT2
OUT1
OUT0
GND
Function
VDAC enable pin
Logic , Protection circuit GND input
Logic power supply input
Serial data input pin
Serial clock input pin
Amplifier + input pin
Amplifier – input pin
HVDD amplifier output pin
Gamma output pin
Gamma output pin
Gamma output pin
Gamma output pin
Gamma output pin
Gamma output pin
Gamma output pin
Buffer amplifier GND input
PIN
No.
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
Pin name
VCC
DACGND
VDD
FB
REFIN
VDAC
DACGND
VCC
GND
OUT13
OUT12
OUT11
OUT10
OUT9
OUT8
OUT7
Function
Power supply input
GND input for DAC
Logic power supply input
Feedback pin
DAC reference voltage input pin
DAC voltage output
GND input for DAC
Power supply input
Buffer amplifier GND input
Gamma output pin
Gamma output pin
Gamma output pin
Gamma output pin
Gamma output pin
Gamma output pin
Gamma output pin
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TSZ22111・15・001
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BD81010MUV
Absolute Maximum Ratings
(Ta=25°C)
Parameter
Power Supply Voltage 1
Power Supply Voltage 2
REFIN Voltage
DAC Reference Voltage
OP. Amplifier Input Pin Voltage
Functional Pin Voltage
2 Lines Serial Terminal Voltage
Junction Temperature
Power Dissipation
Operating Temperature Range
Storage Temperature Range
Symbol
V
DD
V
CC
V
REFIN
V
DAC
V
INP
, V
INN
V
EN
V
SDA
, V
SCL
Tjmax
Pd
Topr
Tstg
Rating
4.5
19.0
7.0
7.0
15.0
4.5
4.5
150
4.56
(Note 1)
-40 to +85
-55 to +150
Unit
V
V
V
V
V
V
V
°C
W
°C
°C
(Note 1) To use the IC at temperatures over Ta½25°C, derate power rating by 27.4mW/°C.
When mounted on a four-layer glass epoxy board measuring 74.2mm x 74.2mm x 1.6mm.
Caution:
Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit
between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is operated over
the absolute maximum ratings.
Recommended Operating Conditions
(Ta½-40°C to +85°C)
Parameter
Power Supply Voltage 1
Power Supply Voltage 2
REFIN Voltage
DAC Reference Voltage
OP. Amplifier Input Pin Voltage
Function Terminal Voltage
2 Lines Serial Terminal Voltage
2 Lines Serial Frequency
VDAC Output Capacity
Symbol
V
DD
V
CC
V
REFIN
V
DAC
V
INP
, V
INN
(< VCCH - 2.5[V] )
V
EN
V
SDA
, V
SCL
f
CLK
C
VDAC
Min
2.1
8.0
2.1
2.1
0.0
-0.1
-0.1
-
1.0
Max
3.6
18.0
5.5
5.5
14.0
+3.6
+3.6
400
-
Unit
V
V
V
V
V
V
V
kHz
µF
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BD81010MUV
Electrical Characteristics
(Unless otherwise noted, Ta½25°C, V
DD
=3.3V, V
CC
=15.0V, V
REFIN
=5.0V )
Parameter
【
Regulator (VDAC)
】
FB Voltage
Input Bias Current
Current Capability
【
Gamma Amplifier
】
Sink Current Capability
Nch Side (AMP0)
Sink Current Capability
Nch Side (AMP1 to AMP12)
Sink Current Capability
Nch Side (AMP13)
Source Current Capability
Pch Side (AMP0)
Source Current Capability
Pch Side (AMP1 to AMP12)
Source Current Capability
Pch Side (AMP13)
Load Stability (OUT0)
Load Stability
(OUT1 to OUT12)
Load Stability (OUT13)
MAX Output Voltage (OUT0)
MAX Output Voltage
(OUT1 to OUT12)
MAX Output Voltage (OUT13)
MIN Output Voltage (OUT0)
MIN Output Voltage
(OUT1 to OUT12)
MIN Output Voltage (OUT13)
Slew Rate (AMP0)
Slew Rate (AMP1 to OUT12)
Slew Rate (AMP13)
【
10 Bit DAC
】
Resolution
Integral Non-linearity Error
(INL)
Differential Non-linearity Error
(DNL)
Symbol
MIN
0.492
-1.2
10
Limit
TYP
0.500
0.0
50
MAX
0.508
1.2
-
Unit
Condition
V
FB
I
FB
I
O
V
µA
mA
V
FB
=0.60V
IooA
IooB
IooC
IoiA
IoiB
IoiC
⊿VO-A
⊿VO-B
⊿VO-C
VOH-A
VOH-B
VOH-C
VOL-A
VOL-B
VOL-C
SR-A
SR-B
SR-C
RES
LE
DLE
-
-
-
40
20
6.6
-
-
-
V
CC
-0.20
V
CC
-1.00
V
CC
-0.60
-
-
-
1
1
1
-
-2
-2
-10.0
-30
-60
60
30
10.0
10
10
10
V
CC
-0.10
V
CC
-0.50
V
CC
-0.30
0.30
0.60
0.10
4
4
4
10
-
-
-6.6
-20
-40
-
-
-
70
70
70
-
-
-
0.60
1.20
0.20
-
-
-
-
+2
+2
mA
mA
mA
mA
mA
mA
mV
mV
mV
V
V
V
V
V
V
V/µsec
V/µsec
V/µsec
Bit
LSB
LSB
during REG0=3BBh (14.0V ) setting,
OUT0=15V input
during REG1 to REG12=199h (6.0V) setting,
OUT1to OUT12=7V input
during REG13=043h (1.0V) setting,
OUT13=2V input
during REG0=3BBh (14.0V) setting,
OUT0=13V input
during REG1 to REG12=199h (6.0V) setting,
OUT1to OUT12=5V
during REG13=043h (1.0V) setting,
OUT13=0V input
I
O
=0mA to -30mA
REG0=199h (6.0V) setting
I
O
=-15mA to 15mA
REG1 to REG12=199h (6.0V) setting
I
O
=0mA to 30mA
REG13=199h (6.0V) setting
I
O
=-30mA
I
O
=-15mA
I
O
=-5mA
I
O
=5mA
I
O
=15mA
I
O
=30mA
OUT0=No-load
OUT1 to OUT12= No-load
OUT13= No-load
00Ah to 3F5h is the allowable margin of
error against the ideal linear.
00Ah to 3F5h is the allowable margin of error
against the ideal increase of 1LSB.
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