MDT10P621
1. General Description
This EPROM-Based 8-bit micro-controller uses a
fully static CMOS technology process to achieve
higher speed and smaller size with the low power
consumption and high noise immunity. On chip
memory includes 4K words of ROM, and 192 bytes
of static RAM.
2. Features
-PortB<7:4> interrupt on change
-CCP,SCM
u
TMR0 : 8-bit real time clock/counter
TMR1 : 16-bit real time clock/count
TMR2 : 8-bit clock/counter(internal)
u
4 types of oscillator can be selected by
programming option:
RC－Low cost RC oscillator
LFXT－Low frequency crystal oscillator
XTAL－Standard crystal oscillator
HFXT－High frequency crystal oscillator
The followings are some of the features on the
hardware and software :
u
On-chip RC oscillator based Watchdog
u
Fully CMOS static design
Timer(WDT)
u
8-bit data bus
u
22 I/O pins with their own independent
u
On chip EPROM size : 4.0 K words
direction control
u
Internal RAM size : 224 bytes
(192 general purpose registers, 32 special
3. Applications
registers)
u
37 single word instructions
The application areas of this MDT10P621 range
u
14-bit instructions
from appliance motor control and high speed
u
8-level stacks
auto-motive
to
low
power
remote
u
Operating voltage : 2.5 V ~ 5.5 V (PRD
transmitters/receivers, pointing devices, and
Disable)
4.5 V ~ 5.5 V (PRD Enable)
telecommunications processors, such as
u
Operating frequency : DC ~ 20 MHz
Remote controller, small instruments, chargers,
u
The most fast execution time is 200 ns
toy, automobile and PC peripheral … etc.
under 20 MHz in all single cycle instructions
except the branch instruction
u
Addressing modes include direct, indirect
and relative addressing modes
u
Power-on Reset
u
Power edge-detector Reset
u
Power range-detector Reset
u
Sleep Mode for power saving
u
Capture,Compare,PWM module
u
Synchronous serial port with SCM
u
7 interrupt sources:
-External INT pin
-TMR0 timer,TMR1 timer,TMR2 timer
This specification are subject to be changed without notice. Any latest information please preview
http;//www.mdtic.com.tw
P.1
2005/6 Ver1.9
MDT10P621
4. Pin Assignment
/MCLR
PA0
PA1
PA2
PA3
PA4/RTCC
PA5/SS
V
ss
OSC1/CLKIN
OSC2/CLKOUT
PC0/T1OSO/T1CKI
PC1/T1OSI
PC2/CCP
PC3/SCK
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
PB7
PB6
PB5
PB4
PB3
PB2
PB1
PB0/INT
V
dd
V
ss
PC7
PC6
PC5/SDO
PC4/SDI
5. Pin Function Description
Pin Name
PA0~PA3,PA5
RTCC/PA4
PB0~PB7
PC0~PC7
/MCLR
OSC1/CLKIN
OSC2/CLKOUT
V
dd
V
ss
I/O
I/O
I/O
I/O
I/O
I
I
O
Function Description
Port A, TTL input level
Real Time Clock/Counter, Schmitt Trigger input level
Open drain output
Port B, TTL input level / PB0:External interrupt input ,
PB4~PB7:Interrupt on pin change
Port C, Schmitt Trigger input level
Master Clear, Schmitt Trigger input level
Oscillator Input/external clock input
Oscillator Output/in RC mode， the CLKOUT pin has 1/4
frequency of CLKIN
Power supply
Ground
This specification are subject to be changed without notice. Any latest information please preview
http;//www.mdtic.com.tw
P.2
2005/5 Ver. 1.8
MDT10P621
Address
12
14
A0~FF
T2PER
SCMSTA
General purpose register
Description
(1) IAR ( Indirect Address Register) : R00
(2) RTCC (Real Time Counter/Counter Register) : R01
(3) PC (Program Counter) : R02,R0A
Write PC --- from PCHLAT
Write PC --- from PCHLAT
LJUMP, LCALL --- from instruction word
RTWI, RET --- from STACK
A11
A10~A8
A7~A0
Write PC --- from ALU
LJUMP, LCALL --- from instruction word
RTWI, RET, RTFI --- from STACK
(4) STATUS (Status register) : R03
Bit
0
1
2
3
4
5
Symbol
C
HC
Z
PF
TF
RBS0
Carry bit
Half Carry bit
Zero bit
Power down Flag bit
WDT Timer overflow Flag bit
Register Bank Select bit :
0 : 00H --- 7FH ( Bank0 )
1 : 80H --- FFH ( Bank1 )
6-7
——
General purpose bit
Function
This specification are subject to be changed without notice. Any latest information please preview
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P.4
2005/5 Ver. 1.8
MDT10P621
(5) MSR (Memory Bank Select Register) : R04
Memory Bank Select Register :
0 : 00~7F (Bank 0)
1 : 80~FF (Bank1)
b7
b6
b5
b4
b3
b2
b1
b0
Indirect Addressing Mode
(6) PORT A : R05
PA5~PA0, I/O Register
(7) PORT B : R06
PB7~PB0, I/O Register
(8) PORT C : R07
PC7~PC0, I/O Register
(9)PCHLAT : R0A
(10) INTS ( Interrupt Status Register ) : R0B
Bit
0
1
2
3
4
5
6
7
Symbol
RBIF
INTF
TIF
RBIE
INTS
TIS
PEIE
GIS
Function
PORT B change interrupt flag. Set when PB <7:4> inputs change
Set when INT interrupt occurs. INT interrupt flag.
Set when TMR0 overflows.
0 : disable PB change interrupt
1 : enable PB change interrupt
0 : disable INT interrupt
1 : enable INT interrupt
0 : disable TMR0 interrupt
1 : enable TMR0 interrupt
0 : disable all peripheral interrupt
1 : enable all peripheral interrupt
0 : disable global interrupt
1 : enable global interrupt
This specification are subject to be changed without notice. Any latest information please preview
http;//www.mdtic.com.tw
P.5
2005/5 Ver. 1.8
DSP and ARM Processors
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