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514ABA000106AAGR

Description
OSC XO 155.5200MHZ LVPECL SMD
CategoryPassive components   
File Size746KB,38 Pages
ManufacturerSilicon Laboratories Inc
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514ABA000106AAGR Overview

OSC XO 155.5200MHZ LVPECL SMD

514ABA000106AAGR Parametric

Parameter NameAttribute value
typeXO (Standard)
frequency155.52MHz
Functionenable/disable (programmable)
outputLVPECL
Voltage - Power2.97 V ~ 3.63 V
frequency stability±25ppm
Absolute pulling range (APR)-
Operating temperature-40°C ~ 85°C
Current - Power (maximum)43mA
grade-
Installation typesurface mount
Package/casing6-SMD, no leads
size/dimensions0.276" long x 0.197" wide (7.00mm x 5.00mm)
Si514
A
N Y
-F
REQUENCY
I
2
C P
R OG R A MM A B L E
X O ( 1 0 0 k H
Z
Features
TO
250 MH
Z
)
Programmable to any frequency
from 100 kHz to 250 MHz
0.026 ppb frequency tuning
resolution
Glitch suppression on OE, power
on and frequency transitions
Low jitter operation
2- to 4-week lead times
Total stability includes 10-year
aging
Comprehensive production test
coverage includes crystal ESR and
DLD
On-chip LDO for power supply
noise filtering
3.3, 2.5, or 1.8 V operation
Differential (LVPECL, LVDS,
HCSL) or CMOS output options
Optional integrated 1:2 CMOS
fanout buffer
Industry standard 5x7, 3.2x5, and
2.5x3.2 mm packages
–40 to 85
o
C operation
Si5602
5x7mm, 3.2x5mm
2.5x3.2mm
Ordering Information:
See page 28.
Applications
All-digital PLLs
DAC+ VCXO replacement
SONET/SDH/OTN
3G-SDI/HD-SDI/SDI
Pin Assignments:
See page 27.
Datacom
Industrial automation
FPGA/ASIC clock generation
FPGA synchronization
SDA
SCL
GND
1
2
3
6
5
4
V
DD
Description
The Si514 user-programmable I
2
C XO utilizes Silicon Laboratories' advanced PLL
technology to provide any frequency from 100 kHz to 250 MHz with programming
resolution of 0.026 parts per billion. The Si514 uses a single integrated crystal and
Silicon Labs’ proprietary DSPLL synthesizer to generate any frequency across this
range using simple I
2
C commands. Ultra-fine tuning resolution replaces DACs and
VCXOs with an all-digital PLL solution that improves performance where
synchronization is necessary or in free-running reference clock applications. This
solution provides superior supply noise rejection, simplifying low jitter clock
generation in noisy environments. Crystal ESR and DLD are individually
production-tested to guarantee performance and enhance reliability.
The Si514 is factory-configurable for a wide variety of user specifications, including
startup frequency, I
2
C address, supply voltage, output format, and stability. Specific
configurations are factory-programmed at time of shipment, eliminating long lead
times and non-recurring engineering charges associated with custom frequency
oscillators.
CLK–
CLK+
Functional Block Diagram
Rev. 1.2 6/18
Copyright © 2018 by Silicon Laboratories
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