MIL-PRF-38534 CERTIFIED
M.S.KENNEDY CORP.
FEATURES:
HIGH EFFICIENCY, HIGH VOLTAGE
4 AMP SURFACE MOUNT
SWITCHING REGULATORS
5045
SERIES
(315) 701-6751
4707 Dey Road Liverpool, N.Y. 13088
Up To 88% Efficiency For 5V Version
4 Amp Output Current
1.2 x V
OUT
to 80V Input Range with Separate Bias
12V to 80V Input Range with UVLO (VBias=V
IN
)
Preset 2.5V, 3.3V or 5.0V Output Versions
300KHz Switching Frequency @ 1 Amp
User Programmable Soft-Start
User Programmable Current Limit
Hermetic Package
-55°C to +125°C Operating Temperature Range
Available with Gull Wing Leads
Contact MSK for MIL-PRF-38534 Qualification Status
DESCRIPTION:
The MSK 5045 series are high efficiency, 4 amp, surface mount switching regulators. The output voltage is config-
ured for 2.5V, 3.3V or 5.0V internally with a tolerance of 1% at 1.5 amps. The operating frequency of the MSK 5045
is 300KHz. An external "soft start" capacitor allows the user to control how quickly the output comes up to regulation
voltage after the application of an input. A low quiescent current and greater than 85% operating efficiency keep the
total internal power dissipation of the MSK 5045 down to an absolute minimum. The input circuitry has been designed
to withstand a very wide range of voltages from less than 12V to as high as 80V. The device is packaged in a hermetic
kovar flatpack for high reliability applications, and is available screened to MIL-PRF-38534 Class H.
EQUIVALENT SCHEMATIC
TYPICAL APPLICATIONS
Step-down Switching Regulator
Microprocessor Power Source
High Efficiency Low Voltage
Subsystem Power Supply
1
2
3
4
5
6
7
1
PIN-OUT INFORMATION
Case
Sense High
Sense Low
NC
RFB
NC
PWR SAVE
34-44
23-33
12-22
11
10
9
8
V
OUT
Ground
V
IN
VBias
Enable
NC
C
TON
Rev. G 2/06
ABSOLUTE MAXIMUM RATINGS
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11
T
C
ELECTRICAL SPECIFICATIONS
NOTES:
1 V
IN
=VBias=28V, 5mV≤(sense high-sense low)
≤
75mV, I
L
=0A, Enable=NC, PWR SAVE=NC C
OUT
=6x220µF, C
IN
=1x250µF+4x10µF, C
TON
=0.01µF unless
otherwise specified.
2 Guaranteed by design but not tested. Typical parameters are representative of actual device performance but are for reference only.
3 All output parameters are tested using a low duty cycle pulse to maintain T
J
= T
C
.
4 Industrial grade and 'E' suffix devices shall be tested to subgroup 1 unless otherwise specified.
5 Military grade devices ('H' suffix) shall be 100% tested to subgroups 1,2 and 3.
6 Subgroup 1 T
A
=T
C
=+25°C
Subgroup 2 T
A
=T
C
=+125°C
Subgroup 3 T
A
=T
C
=-55°C
7 Actual switching frequency is load dependent if output current is low and sense resistor is large or zero. Refer to typical performance curves.
8 Alternate output voltages are available. Please contact the factory.
9 The device can withstand input voltages as high as 80V, but efficiency is best at lower inputs.
10 With VBias (pin 11) connected to a separate source, V
IN
Min. is V
OUT
+V
DROPOUT
; see dropout curves.
11 Continuous operation at or above absolute maximum ratings may adversely effect the device performance and/or life cycle.
2
Rev. G 2/06
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15°C/W
T
J
-40°C to +85°C
-55°C to +125°C
+150°C
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Input Voltage
Enable
PWR SAVE
Output Current
Sense Pin Voltage
Thermal Resistance (@ 125°C)
(Each MOSFET)
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-0.3V, +80V
-0.3V, 10.5V
-0.3V, 5.5V
4.0 Amps
-0.3V, +7V
T
ST
T
LD
Storage Temperature Range
Lead Temperature Range
(10 Seconds)
Case Operating Temperature
MSK5045 Series
MSK5045H/E Series
Junction Temperature
-65°C to +150°C
300°C
APPLICATION NOTES
SOFT START/Cton:
INPUT BIAS AND UVLO:
Pin 11 of the MSK 5045 provides bias to an internal linear
regulator that powers the control circuitry. The Vbias pin can
be connected directly to the input bus for 12V to 80V opera-
tion or it can be biased separately with a 12V to 15V source to
extend the input range of the device and improve efficiency at
high line; refer to the paragraph titled "INPUT VOLTAGE
RANGE". Vbias must be applied simultaneous with or prior to
the input voltage. The MSK 5045's built in under voltage lock-
out feature prevents damage to downstream devices in the
event of a drop in bias voltage. Under voltage lockout occurs
at bias voltages of approximately 10V rising and 9.7V falling.
When separating the bias voltage from Vin to extend the input
range below the Vbias UVLO set point, a simple open collector
circuit can disable the device at any desired set point for Vin if
UVLO is required. The internal bias draws approximately 30mA
under normal operation and less than 10mA in Power Save
mode with a light load on the output.
The internal soft-start circuitry allows a gradual increase of
the internal current-limit level at start-up for the purpose of
reducing input surge currents, and possibly for power-supply
sequencing. In Disable mode, the soft-start circuit holds the
Cton capacitor discharged to ground. When Enable goes high,
a 4µA current source charges the Cton capacitor up to 3.2V.
The resulting linear ramp causes the internal current-limit thresh-
old to increase proportionally from 20mV to 100mV. The out-
put capacitors charge up relatively slowly, depending on the
Cton capacitor value. The exact time of the output rise de-
pends on output capacitance and load current and is typically
1mS per nanofarad of soft-start capacitance. With no capaci-
tor connected, maximum current limit is reached typically within
10µS.
POWER DISSIPATION:
In high current applications, it is very important to ensure
that both MOSFETS are within their maximum junction tem-
perature at high ambient temperatures. Temperature rise can
be calculated based on package thermal resistance and worst
case dissipation for each MOSFET. These worst case dissipa-
tions occur at minimum voltage for the high side MOSFET and
at maximum voltage for the low side MOSFET.
Calculate power dissipation using the following formulas:
Pd (upper FET)=I
LOAD
² x 0.090Ω x DUTY
+ V
IN
x I
LOAD
x f x V
IN
x C
RSS
+25ns
I
GATE
Pd (lower FET)=I
LOAD
² x 0.090Ω x (1-DUTY)
DUTY= (V
OUT
+V
Q2
)
(V
IN
-V
Q1
)
Where: V
Q1
or V
Q2
(on state voltage drop)=I
LOAD
x 0.090Ω
C
RSS
=65pF
I
GATE
=2A
During output short circuit, Q2, the synchronous-rectifier
MOSFET, will have an increased duty factor and will see addi-
tional stress. This can be calculated by:
Q2 DUTY=1-
V
Q2
V
IN(MAX)
-V
Q1
Where: V
Q1
or V
Q2
=(120
MV
/R
SENSE
) x 0.090
INPUT VOLTAGE RANGE
The MSK 5045's wide input range of 12V to 80V can be
further extended down to V
OUT
+ V
DROPOUT
by using a sepa-
rate bias supply; refer to the paragraph titled "LOW VOLTAGE
OPERATION". In this configuration very efficient low V to low
V conversion can be achieved. At high line voltages the inter-
nal linear regulator dissipates more power than at low line. This
loss in efficiency can be eliminated with a separate bias supply
pushing the high line efficiency up close to the low line perfor-
mance. Output ripple changes with line voltage; refer to the
paragraph titled "OUTPUT INDUCTOR (OPTIONAL)" for more
information.
SELECTING RS:
The MSK 5045 monitors the inductor current and the aver-
age load current by sensing the voltage across RS. Cycle-by-
cycle current limiting is controlled with an upper threshold of
100mV ±20mV; the high side MOSFET switch is gated off
whenever the upper threshold is exceeded. Pulse skipping oc-
curs in power save mode when the signal falls below the 30%
current threshold of 30mV. The sychronous rectifier is disabled
when the signal falls below 0V indicating discontinuous induc-
tor current. Selection of RS must take all of these features into
consideration.
When operated in the continuous conduction mode peak to
peak inductor current is approximated by the equation
(V
IN
-V
OUT
)
.
V
OUT
f
.
L
.
V
IN
where f=300KHz and L=6.4µH. (If optional output inductance
is used L=6.4uH + optional L). The device will operate in
continuous conduction as long as IOUT
≥
½ Ip-p. The maxi-
mum and minimum current peaks are equal to IOUT±½ Ip-p.
RS translates the current levels into the control signal. Once
the current levels are established the designer can size RS for
specific applications. Care must be taken when selecting RS
because under a short circuit condition the output current will
approach the cycle-by-cycle current limit.
For most applications, it may be useful to wire the sense
inputs with a twisted pair instead of PCB traces. Low induc-
tance current sense resistors, such as metal film surface mount
styles are best.
INPUT CAPACITOR SELECTION:
The MSK 5045 should have an external high frequency
ceramic capacitor (0.1uF) between VIN and GND. Connect a
low-ESR bulk capacitor directly to the input pin of the MSK
5045. Select the bulk input filter capacitor according to input
ripple-current requirements and voltage rating, rather than ca-
pacitor value. Electrolytic capacitors that have low enough
ESR to meet the ripple-current requirement invariably have more
than adequate capacitance values. Aluminum-electrolytic ca-
pacitors are preferred over tantalum types, which could cause
power-up surge-current failure when connecting to robust AC
adapters or low-impedance batteries. RMS input ripple current
is determined by the input voltage and load current, with the
worst possible case occuring at VIN = 2 x VOUT:
I
RMS
= I
LOAD
x
√V
OUT
(V
IN
-V
OUT
)
V
IN
3
Rev. G 2/06
APPLICATION NOTES CONT'D
OUTPUT CAPACITOR SELECTION:
The output capacitor values are generally determined
by the ESR and voltage rating requirements rather than
capacitance requirements for stability. Low ESR capaci-
tors that meet the ESR requirement usually have more
output capacitance than required for stability. Only spe-
cialized low-ESR capacitors intended for switching-regu-
lator applications, such as AVX TPS, Sprague 595D,
Sanyo OS-CON, Nichicon PL series or Kemet T510 se-
ries should be used. The capacitor must meet minimum
capacitance and maximum ESR values as given in the
following equations:
C
F
> 2.5V(1 + V
OUT
/V
IN
(
MIN
))
V
OUT
x R
SENSE
x f
R
ESR
< R
SENSE
x V
OUT
2.5V
These equations provide 45 degrees of phase margin
to ensure jitter-free fixed-frequency operation and pro-
vide a damped output response for zero to full-load step
changes. Lower quality capacitors can be used if the
load lacks large step changes. Bench testing over tem-
perature is recommended to verify acceptable noise and
transient response. As phase margin is reduced, the
first symptom is timing jitter, which shows up in the
switching waveforms. Technically speaking, this typi-
cally harmless jitter is unstable operation, since the
switching frequency is non-constant. As the capacitor
ESR is increased, the jitter becomes worse. Eventually,
the load-transient waveform has enough ringing on it
that the peak noise levels exceed the output voltage tol-
erance. With zero phase margin and instability present,
the output voltage noise never gets much worse than
I
PEAK
x R
ESR
(under constant loads). Designers of indus-
trial temperature range digital systems can usually multi-
ply the calculated ESR value by a factor of 1.5 without
hurting stability or transient response.
The output ripple is usually dominated by the ESR of
the filter capacitors and can be approximated as IRIPPLE
x RESR. Including the capacitive term, the full equation
for ripple in the continuous mode is V
NOISE
(p-p)=I
RIPPLE
x (R
ESR
+ 1/(2πfC)). In pulse skipping mode, the induc-
tor current becomes discontinuous with high peaks and
widely spaced pulses, so the noise can actually be higher
at light load compared to full load. In pulse skipping mode,
the output ripple can be calculated as follows:
V
NOISE
(p-p)= 0.02 x R
ESR
+
0.0003 x 6.4µH x [1/V
OUT
+1/(
VIN
-V
OUT
)]
R
SENSE
(R
SENSE
)² x C
CURRENT LIMITING:
Current limiting the MSK5045 is achieved by setting the
cycle-by-cycle current limit as described in the section titled
SELECTING RS. The designer must set the peak current limit
such that the average output current will not exceed the appli-
cation limits. In a short circuit condition the average output cur-
rent will approach the peak current limit. RS should be selected
such that the average output current will not exceed 4.0 Amps.
RS must be small enough to allow for the required load current
plus the peak ripple current; 80mV/RS=IOUT+½Ip-p. Load
components should be sized to withstand a maximum current
of 120mV/RS
OUTPUT INDUCTOR (OPTIONAL):
Placing an output inductor between the package and
the sense resistor will reduce output ripple and noise.
Output ripple and noise increase as the input to output
voltage differential increases. Ouput ripple is also higher
when the MSK 5045 is operated in power save mode.
Optional inductance will directly add to the internal in-
ductance of the device and should be included in peak to
peak current calculations (see SELECTING RS). Since ad-
ditional inductance will affect the output response of the
regulator, the inductance value must be carefully selected
for each application.
RFB:
It is very important that the DC voltage returned to the
RFB pin from the output be as noise and oscillation free
as possible. This voltage helps to determine the final out-
put and therefore must be a clean voltage. Excessive noise
or oscillation can cause the device to have an incorrect
output voltage. Proper PC board layout techniques can
help to achieve a noise free voltage at the RFB pin.
POWER SAVE MODE:
Power save mode is enabled by applying a logic low to
the PWR SAVE pin and disabled by applying a logic high
or leaving it open. The MSK5045 will skip switching pulses
to save gate drive current in Q1 and Q2 when operated
under light load with power save enabled. MSK5045
senses the voltage across RS and skips most switching
pulses when the voltage falls below 30mV indicating a
light load condition. The oscillator is gated off because
the minimum current comparator resets the high side latch
at the start of each cycle until the voltage feedback sig-
nal falls below the output voltage set point. Under heavy
loads the voltage across RS does not fall below 30mV
and the MSK5045 operates in full PWM mode at 300
KHz.
Disabling the power save mode sets the PWM to
300KHz constant switching frequency for low noise mode
operation. Maximum input voltage on the PWR SAVE pin
is 5.5V. The PWR SAVE pin has an internal pull-up resis-
tor to 5V. RS should not be eliminated when power save
is disabled because it provides cycle-by-cycle current lim-
iting and synchronous rectifier control as described in the
SEQUENCE OF OPERATION paragraph. Refer to table 1
for power save mode operational characteristics.
4
Rev. G 2/06
ENABLE FUNCTION:
The MSK 5045 is enabled by applying a logic level high to
the Enable pin or leaving it open. A logic level low will disable
the device and quiescent input current will reduce to approxi-
mately 1mA. The Enable threshold voltage is 1V. If automatic
start up is required, simply make no connection. Maximum En-
able voltage is +10.5V. The Enable pin has an internal pull up
resistor to 10.5V.
APPLICATION NOTES CONT'D
LOW VOLTAGE OPERATION
The MSK 5045 is capable of low voltage to low voltage conversion with up to 90% efficiency. A 5V bus can be
stepped down to 3.3V or 2.5V with greater efficiency than linear conversion. Using an external bias supply the input
voltage can be as low as V
OUT
plus V
DROPOUT
; consult the dropout curves for typical dropout voltages. Low line
regulation error is easily trimmed with a low value feedback resistor in series with the RFB pin (5). Since the input
current of the pin is approximately 250uA the output will increase by approximately 25mV per 100 ohms of resis-
tance. The resistor should be selected such that the output voltage does not exceed the nominal output by more than
0.25V under the high input condition. Placing the feedback resistor as close to the device pin as possible helps to
maintain noise immunity.
SEQUENCE OF OPERATION
Each pulse from the oscillator sets the internal PWM latch that turns on the high-side MOSFET. As the high-switch
turns off, the synchronous rectifier latch is set. 60ns later the low-side MOSFET turns on until the start of the next
clock cycle or until the inductor current crosses zero. Under fault conditions the current exceeds the ±100mV
current-limit threshold and the high-side switch turns off. Under light load conditions the synchronous rectifier is
gated off as the inductor current falls through zero.
TABLE 1
OPERATIONAL CHARACTERISTICS
PWR SAVE
X
0
0
0
1
ENABLE
0
1
1
1
1
LOAD
X
LOW <10%
MED <30%
HIGH >30%
X
DESCRIPTION
DEVICE DISABLED
PULSE SKIPPING MODE DISCONTINUOUS INDUCTOR CURRENT
PULSE SKIPPING MODE CONTINUOUS INDUCTOR CURRENT
CONSTANT FREQ. PWM MODE CONTINUOUS INDUCTOR CURRENT
LOW NOISE CONSTANT FREQ. MODE
5
Rev. G 2/06
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