74HCT165N,652 datasheet, PDF - EEWORLD Datasheet

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74HCT165N,652: DescriptionIC SHIFT REG 8BIT PI-SO 16DIP; Categorylogic logic; File Size131KB，22 Pages; ManufacturerNXP; Websitehttps://www.nxp.com; Environmental Compliance

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74HCT165N,652 Overview

IC SHIFT REG 8BIT PI-SO 16DIP

74HCT165N,652 Parametric

Parameter Name	Attribute value
Brand Name	NXP Semiconductor
Is it Rohs certified?	conform to
Maker	NXP
Parts packaging code	DIP
package instruction	DIP, DIP16,.3
Contacts	16
Manufacturer packaging code	SOT38-4
Reach Compliance Code	compliant
Other features	CLOCK INHIBIT
Counting direction	RIGHT
series	HCT
JESD-30 code	R-PDIP-T16
JESD-609 code	e4
length	19.025 mm
Load capacitance (CL)	50 pF
Logic integrated circuit type	PARALLEL IN SERIAL OUT
Maximum Frequency@Nom-Sup	21000000 Hz
Number of digits	8
Number of functions	1
Number of terminals	16
Maximum operating temperature	125 °C
Minimum operating temperature	-40 °C
Output polarity	COMPLEMENTARY
Package body material	PLASTIC/EPOXY
encapsulated code	DIP
Encapsulate equivalent code	DIP16,.3
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	260
power supply	5 V
propagation delay (tpd)	51 ns
Certification status	Not Qualified
Maximum seat height	4.2 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	AUTOMOTIVE
Terminal surface	NICKEL PALLADIUM GOLD
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
Trigger type	POSITIVE EDGE
width	7.62 mm
minfmax	17 MHz
Base Number Matches	1

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74HC165; 74HCT165

8-bit parallel-in/serial out shift register

Rev. 03 — 14 March 2008

Product data sheet

1. General description

The 74HC165; 74HCT165 are high-speed Si-gate CMOS devices that comply with

JEDEC standard no. 7A. They are pin compatible with Low-power Schottky TTL (LSTTL).

The 74HC165; 74HCT165 are 8-bit parallel-load or serial-in shift registers with

complementary serial outputs (Q7 and Q7) available from the last stage. When the

parallel load (PL) input is LOW, parallel data from the D0 to D7 inputs are loaded into the

When PL is HIGH, data enters the register serially at the DS input and shifts one place to

the right (Q0

→

Q2, etc.) with each positive-going clock transition. This feature

allows parallel-to-serial converter expansion by tying the Q7 output to the DS input of the

succeeding stage.

The clock input is a gated-OR structure which allows one input to be used as an active

LOW clock enable (CE) input. The pin assignment for the CP and CE inputs is arbitrary

and can be reversed for layout convenience. The LOW-to-HIGH transition of input CE

should only take place while CP HIGH for predictable operation. Either the CP or the CE

should be HIGH before the LOW-to-HIGH transition of PL to prevent shifting the data

when PL is activated.

2. Features

Asynchronous 8-bit parallel load

Synchronous serial input

Complies with JEDEC standard no. 7A

ESD protection:

HBM JESD22-A114E exceeds 2000 V

MM JESD22-A115-A exceeds 200 V

Speciﬁed from

−40 °C

to +85

°C

and from

−40 °C

to +125

°C

3. Applications

Parallel-to-serial data conversion

74HCT165N,652 Related Products

	74HCT165N,652	74HC165D/T3	74HC165N,652	74HC165BQ-G	74HCT165D/T3
Description	IC SHIFT REG 8BIT PI-SO 16DIP	IC HC/UH SERIES, 8-BIT RIGHT PARALLEL IN SERIAL OUT SHIFT REGISTER, COMPLEMENTARY OUTPUT, PDSO16, MINI, PLASTIC, SO-16, Shift Register	IC SHIFT REGST 8BIT PI-SO 16DIP	IC,SHIFT REGISTER,HC-CMOS,LLCC,16PIN,PLASTIC	IC HCT SERIES, 8-BIT RIGHT PARALLEL IN SERIAL OUT SHIFT REGISTER, COMPLEMENTARY OUTPUT, PDSO16, MINI, PLASTIC, SO-16, Shift Register
Is it Rohs certified?	conform to	conform to	conform to	conform to	conform to
Maker	NXP	NXP	NXP	NXP	NXP
package instruction	DIP, DIP16,.3	MINI, PLASTIC, SO-16	DIP, DIP16,.3	QCCN, LCC16,.1X.14,20	MINI, PLASTIC, SO-16
Reach Compliance Code	compliant	compliant	compliant	unknown	compliant
JESD-30 code	R-PDIP-T16	R-PDSO-G16	R-PDIP-T16	R-PQCC-N16	R-PDSO-G16
Number of digits	8	8	8	8	8
Number of functions	1	1	1	1	1
Number of terminals	16	16	16	16	16
Maximum operating temperature	125 °C	125 °C	125 °C	125 °C	125 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	DIP	TSSOP	DIP	QCCN	TSSOP
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	IN-LINE	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	IN-LINE	CHIP CARRIER	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
surface mount	NO	YES	NO	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE
Terminal form	THROUGH-HOLE	GULL WING	THROUGH-HOLE	NO LEAD	GULL WING
Terminal pitch	2.54 mm	0.65 mm	2.54 mm	0.5 mm	0.65 mm
Terminal location	DUAL	DUAL	DUAL	QUAD	DUAL
Base Number Matches	1	1	1	1	1
Parts packaging code	DIP	SOIC	DIP	-	SOIC
Contacts	16	16	16	-	16
Other features	CLOCK INHIBIT	CLOCK INHIBIT	CLOCK INHIBIT	-	CLOCK INHIBIT
Counting direction	RIGHT	RIGHT	RIGHT	-	RIGHT
series	HCT	HC/UH	HC/UH	-	HCT
JESD-609 code	e4	e4	e4	-	e4
length	19.025 mm	5 mm	19.025 mm	-	5 mm
Logic integrated circuit type	PARALLEL IN SERIAL OUT	PARALLEL IN SERIAL OUT	PARALLEL IN SERIAL OUT	-	PARALLEL IN SERIAL OUT
Maximum Frequency@Nom-Sup	21000000 Hz	-	24000000 Hz	24000000 Hz	-
Output polarity	COMPLEMENTARY	COMPLEMENTARY	COMPLEMENTARY	-	COMPLEMENTARY
Encapsulate equivalent code	DIP16,.3	-	DIP16,.3	LCC16,.1X.14,20	-
Peak Reflow Temperature (Celsius)	260	260	260	-	260
power supply	5 V	-	2/6 V	2/6 V	-
propagation delay (tpd)	51 ns	50 ns	250 ns	-	51 ns
Maximum seat height	4.2 mm	1.1 mm	4.2 mm	-	1.1 mm
Maximum supply voltage (Vsup)	5.5 V	6 V	6 V	-	5.5 V
Minimum supply voltage (Vsup)	4.5 V	2 V	2 V	-	4.5 V
Nominal supply voltage (Vsup)	5 V	5 V	5 V	-	5 V
Terminal surface	NICKEL PALLADIUM GOLD	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	-	NICKEL PALLADIUM GOLD
Maximum time at peak reflow temperature	30	30	30	-	30
Trigger type	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE	-	POSITIVE EDGE
width	7.62 mm	4.4 mm	7.62 mm	-	4.4 mm
minfmax	17 MHz	20 MHz	20 MHz	-	17 MHz

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Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

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