74LV86BQ datasheet, PDF - EEWORLD Datasheet

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74LV86BQ: DescriptionQuad 2-input exclusive-OR gate; Categorylogic logic; File Size82KB，15 Pages; ManufacturerNXP; Websitehttps://www.nxp.com; Environmental Compliance

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74LV86BQ Overview

Quad 2-input exclusive-OR gate

74LV86BQ Parametric

Parameter Name	Attribute value
Source Url Status Check Date	2013-06-14 00:00:00
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	NXP
Parts packaging code	QFN
package instruction	HVQCCN, LCC14,.1X.12,20
Contacts	14
Reach Compliance Code	compli
series	LV/LV-A/LVX/H
JESD-30 code	R-PQCC-N14
JESD-609 code	e4
length	3 mm
Load capacitance (CL)	50 pF
Logic integrated circuit type	XOR GATE
MaximumI(ol)	0.006 A
Humidity sensitivity level	1
Number of functions	4
Number of entries	2
Number of terminals	14
Maximum operating temperature	125 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	HVQCCN
Encapsulate equivalent code	LCC14,.1X.12,20
Package shape	RECTANGULAR
Package form	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)	260
power supply	3.3 V
Prop。Delay @ Nom-Su	24 ns
propagation delay (tpd)	41 ns
Certification status	Not Qualified
Schmitt trigger	NO
Maximum seat height	1 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	1 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	AUTOMOTIVE
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form	NO LEAD
Terminal pitch	0.5 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	30
width	2.5 mm

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74LV86

Quad 2-input exclusive-OR gate

Rev. 03 — 27 November 2007

Product data sheet

1. General description

The 74LV86 is a low-voltage Si-gate CMOS device that is pin and function compatible with

74HC86 and 74HCT86.

The 74LV86 provides a quad 2-input exclusive-OR function.

2. Features

Wide operating voltage: 1.0 V to 5.5 V

Optimized for low voltage applications: 1.0 V to 3.6 V

Accepts TTL input levels between V

= 2.7 V and V

= 3.6 V

Typical output ground bounce < 0.8 V at V

= 3.3 V and T

amb

= 25

°C

Typical HIGH-level output voltage (V

) undershoot: > 2 V at V

= 3.3 V and

amb

= 25

°C

ESD protection:

HBM JESD22-A114E exceeds 2000 V

MM JESD22-A115-A exceeds 200 V

Multiple package options

Speciﬁed from

−40 °C

to +85

°C

and from

−40 °C

to +125

°C

3. Ordering information

Table 1.

Ordering information

Package

Temperature range

74LV86N

74LV86D

74LV86DB

74LV86PW

74LV86BQ

−40 °C

to +125

°C

−40 °C

to +125

°C

−40 °C

to +125

°C

−40 °C

to +125

°C

−40 °C

to +125

°C

Name

DIP14

SO14

SSOP14

TSSOP14

Description

plastic dual in-line package; 14 leads (300 mil)

plastic small outline package; 14 leads;

body width 3.9 mm

plastic shrink small outline package; 14 leads;

body width 5.3 mm

plastic thin shrink small outline package; 14 leads;

body width 4.4 mm

Version

SOT27-1

SOT108-1

SOT337-1

SOT402-1

SOT762-1

Type number

DHVQFN14 plastic dual in-line compatible thermal enhanced very

thin quad ﬂat package; no leads; 14 terminals;

body 2.5

0.85 mm

74LV86BQ Related Products

	74LV86BQ	74LV86
Description	Quad 2-input exclusive-OR gate	Quad 2-input exclusive-OR gate

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