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74LVC2G00GS,115

Description
IC GATE NAND 2CH 2-INP 8XSON
Categorylogic    logic   
File Size247KB,21 Pages
ManufacturerNexperia
Websitehttps://www.nexperia.com
Download Datasheet Parametric Compare View All

74LVC2G00GS,115 Overview

IC GATE NAND 2CH 2-INP 8XSON

74LVC2G00GS,115 Parametric

Parameter NameAttribute value
Brand NameNexperia
MakerNexperia
Parts packaging codeSON
package instructionVSON,
Contacts8
Manufacturer packaging codeSOT1203
Reach Compliance Codecompliant
Samacsys Description74LVC2G00 - Dual 2-input NAND gate@en-us
seriesLVC/LCX/Z
JESD-30 codeR-PDSO-N8
JESD-609 codee3
length1.35 mm
Logic integrated circuit typeNAND GATE
Humidity sensitivity level1
Number of functions2
Number of entries2
Number of terminals8
Maximum operating temperature125 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeVSON
Package shapeRECTANGULAR
Package formSMALL OUTLINE, VERY THIN PROFILE
propagation delay (tpd)10.8 ns
Maximum seat height0.35 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)1.65 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelAUTOMOTIVE
Terminal surfaceTin (Sn)
Terminal formNO LEAD
Terminal pitch0.35 mm
Terminal locationDUAL
width1 mm
Base Number Matches1
74LVC2G00
Rev. 15 — 3 July 2017
Dual 2-input NAND gate
Product data sheet
1
General description
The 74LVC2G00 provides a 2-input NAND gate function.
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of
these devices as translators in a mixed 3.3 V and 5 V environment.
This device is fully specified for partial power-down applications using I
OFF
. The I
OFF
circuitry disables the output, preventing the damaging backflow current through the
device when it is powered down.
2
Features and benefits
Wide supply voltage range from 1.65 V to 5.5 V
5 V tolerant outputs for interfacing with 5 V logic
High noise immunity
±24 mA output drive (V
CC
= 3.0 V)
CMOS low power consumption
Complies with JEDEC standard:
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8-B/JESD36 (2.7 V to 3.6 V)
Latch-up performance exceeds 250 mA
Direct interface with TTL levels
Inputs accept voltages up to 5 V
ESD protection:
HBM JESD22-A114F exceeds 2 000 V
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from -40 °C to +85 °C and -40 °C to +125 °C
3
Ordering information
Package
Temperature
range
Name
Description
Version
SOT505-2
SOT765-1
Table 1. Ordering information
Type number
74LVC2G00DP
74LVC2G00DC
-40 °C to +125 °C
-40 °C to +125 °C
TSSOP8 plastic thin shrink small outline package; 8 leads;
body width 3 mm; lead length 0.5 mm
VSSOP8 plastic very thin shrink small outline package; 8 leads;
body width 2.3 mm

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Description IC GATE NAND 2CH 2-INP 8XSON IC GATE NAND 2CH 2-INP 8XSON IC GATE NAND 2CH 2-INP 8X2SON IC GATE NAND 2CH 2-INP 8XSON IC GATE NAND 2CH 2-INP 8XSON IC GATE NAND 2CH 2-INP 8VSSOP IC GATE NAND 2CH 2-INP 8TSSOP 74LVC2G00 - Dual 2-input NAND gate QFN 8-Pin
Brand Name Nexperia Nexperia Nexperia Nexperia Nexperia Nexperia Nexperia Nexperia
package instruction VSON, VSON, SOLCC8,.11,20 HVBCC, VSON, VSON, 2.30 MM, PLASTIC, MO-187, SOT765-1, VSSOP-8 TSSOP-8 1.60 X 1.60 MM, 0.50 MM HEIGHT, 0.50 MM PITCH, PLASTIC, MO-255, SOT902-1, QFN-8
Manufacturer packaging code SOT1203 SOT996-2 SOT1233 SOT833-1 SOT1089 SOT765-1 SOT505-2 SOT902-2
Maker Nexperia Nexperia Nexperia Nexperia Nexperia Nexperia Nexperia -
Parts packaging code SON SON - SON SON SSOP TSSOP QFN
Contacts 8 8 - 8 8 8 8 8
Reach Compliance Code compliant compliant compliant compliant compliant compliant compliant -
Samacsys Description 74LVC2G00 - Dual 2-input NAND gate@en-us - - 74LVC2G00 - Dual 2-input NAND gate@en-us 74LVC2G00 - Dual 2-input NAND gate@en-us 74LVC2G00 - Dual 2-input NAND gate@en-us 74LVC2G00 - Dual 2-input NAND gate@en-us -
series LVC/LCX/Z LVC/LCX/Z LVC/LCX/Z LVC/LCX/Z LVC/LCX/Z LVC/LCX/Z LVC/LCX/Z -
JESD-30 code R-PDSO-N8 R-PDSO-N8 R-PBCC-B8 R-PDSO-N8 R-PDSO-N8 R-PDSO-G8 S-PDSO-G8 -
JESD-609 code e3 e4 - e3 e3 e4 e4 -
length 1.35 mm 3 mm 1.35 mm 1.95 mm 1.35 mm 2.3 mm 3 mm -
Logic integrated circuit type NAND GATE NAND GATE NAND GATE NAND GATE NAND GATE NAND GATE NAND GATE -
Humidity sensitivity level 1 1 1 1 1 1 1 -
Number of functions 2 2 2 2 2 2 2 -
Number of entries 2 2 2 2 2 2 2 -
Number of terminals 8 8 8 8 8 8 8 -
Maximum operating temperature 125 °C 125 °C 125 °C 125 °C 125 °C 125 °C 125 °C -
Minimum operating temperature -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C -
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY -
encapsulated code VSON VSON HVBCC VSON VSON VSSOP TSSOP -
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR SQUARE -
Package form SMALL OUTLINE, VERY THIN PROFILE SMALL OUTLINE, VERY THIN PROFILE CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE SMALL OUTLINE, VERY THIN PROFILE SMALL OUTLINE, VERY THIN PROFILE SMALL OUTLINE, VERY THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH -
propagation delay (tpd) 10.8 ns 10.8 ns 10.8 ns 10.8 ns 10.8 ns 10.8 ns 10.8 ns -
Maximum seat height 0.35 mm 0.5 mm 0.35 mm 0.5 mm 0.5 mm 1 mm 1.1 mm -
Maximum supply voltage (Vsup) 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V -
Minimum supply voltage (Vsup) 1.65 V 1.65 V 1.65 V 1.65 V 1.65 V 1.65 V 1.65 V -
Nominal supply voltage (Vsup) 3.3 V 2.3 V - 1.8 V 3.3 V 2.3 V 2.3 V -
surface mount YES YES YES YES YES YES YES -
technology CMOS CMOS CMOS CMOS CMOS CMOS CMOS -
Temperature level AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE -
Terminal surface Tin (Sn) NICKEL PALLADIUM GOLD - Tin (Sn) Tin (Sn) Nickel/Palladium/Gold (Ni/Pd/Au) Nickel/Palladium/Gold/Silver (Ni/Pd/Au/Ag) -
Terminal form NO LEAD NO LEAD BUTT NO LEAD NO LEAD GULL WING GULL WING -
Terminal pitch 0.35 mm 0.5 mm - 0.5 mm 0.35 mm 0.5 mm 0.65 mm -
Terminal location DUAL DUAL BOTTOM DUAL DUAL DUAL DUAL -
width 1 mm 2 mm 0.8 mm 1 mm 1 mm 2 mm 3 mm -
Base Number Matches 1 1 - 1 1 1 1 1
Peak Reflow Temperature (Celsius) - 260 260 260 - 260 260 -
Maximum time at peak reflow temperature - 30 30 30 - 30 30 -
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