ISO-9001 CERTIFIED BY DSCC
M.S.KENNEDY CORP.
FEATURES:
ULTRA-ACCURATE/HIGH SLEW RATE
INVERTING
OPERATIONAL AMPLIFIER
739
(315) 701-6751
4707 Dey Road Liverpool, N.Y. 13088
Very Fast Setting Time - 10nS to 0.1% Typical
Very Fast Slew Rate - 5500 V/µS Typical
Unity Gain Bandwidth - 220 MHz Typical
Low Noise - 0.15uVrms Typical (f=0.1Hz to 10Hz)
Very Accurate (Low Offset) ±75µV Max.
Pin Compatable with AD9610
MIL-PRF-38534 QUALIFIED
The MSK 739 is an inverting composite operational amplifier that combines extremely high bandwidth and slew rate with
excellent D.C. accuracy to produce an amplifier perfectly suited for high performance data aquisition and conversion as well
as high speed commmunication and line drive. The performance of the MSK 739 is guaranteed over the full military tem-
perature range and for more cost sensitive applications is available in an industrial version. The standard package style is a
space efficient 12 pin TO-8. However, alternate package styles are available upon request.
DESCRIPTION:
EQUIVALENT SCHEMATIC
EQUIVALENT SCHEMATIC
TYPICAL APPLICATIONS
TYPICAL APPLICATIONS
High Performance Data Aquisition
Coaxial Line Driver
Data Conversion Circuits
High Speed Communications
Ultra High Resolution Video Amplifier
1
2
3
4
5
6
1
PIN-OUT INFORMATION
Positive Power Supply 7 Ground
8 NC
NC
9 Negative Power Supply
Case Ground
10 Negative Short Circuit
Internal Feedback
11 Output
Inverting Input
12 Positive Short Circuit
Non-Inverting Input
Rev. A 4/02
ABSOLUTE MAXIMUM RATINGS
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ELECTRICAL SPECIFICATIONS
Parameter
STATIC
Supply Voltage Range
2
Quiescent Current
Thermal Resistance
2
INPUT
Input Offset Voltage
Input Offset Voltage Drift
Input Bias Current
7
Input Offset Current
Input Impedance
2
Power Supply Rejection Ratio
2
Input Noise Voltage
2
2
2
±Vcc=±15V Unless Otherwise Specified
Group A
MSK 739B/E
Typ.
±15
±35
±36
45
±25
±0.5
±10
±15
5
5
5
1
0.15
3.8
0.6
±12.5
10
22
220
5500
110
Max.
±18
±37
±39
-
±75
±1.5
±40
±80
20
40
-
8
-
-
-
-
-
35
-
-
-
-
Min.
±12
-
-
-
-
-
-
-
-
-
-
-
-
-
-
±10
-
15
165
3500
95
MSK 739
Typ.
±15
±37
-
48
±50
±0.75
±20
-
10
-
5
2
0.2
4
0.7
±12.5
15
20
190
4000
105
Max.
±18
±40
-
-
±100
±60
-
30
-
-
20
-
-
-
-
-
45
-
-
-
-
Units
V
mA
mA
°C/W
µV
nA
nA
nA
nA
MΩ
µV/V
µVp-p
nV√Hz
pA√Hz
V
mA
nS
MHz
MHz
V/µS
dB
Subgroup Min.
-
Vin=0V
1
2,3
-
1
2,3
1
2,3
1
2,3
-
-
-
-
-
4
4
-
4
-
4
4
±12
-
-
-
-
-
-
-
-
-
-
-
-
-
-
±10
-
20
175
4000
100
Test Conditions
Av=-1V/V
Output Devices Junction to Case
Vin=0V Av=-100V/V
Vin=0V
Vcm=0V
Either Input
Vcm=0V
F=DC Differential
∆Vcc=±5V
F= 0.1Hz To 10Hz
F=1KHz
F=1KHz
R
L
=100Ω Av=-3V/V F≤10MHz
T
J
<150°C
1
2
±2.0 µV/°C
Input Noise Voltage Density
Input Noise Current Density
OUTPUT
Output Voltage Swing
Output Current
Settling Time
Full Power Bandwidth
Bandwidth (Small Signal)
2
TRANSFER CHARACTERISTICS
Slew Rate
Open Loop Voltage Gain
2
±100 ±120
±100 ±120
0.1% 10V step R
L
=1KΩ
R
L
=100Ω Vo=±10V
R
L
=100Ω
V
OUT
=±10V R
L
=1KΩ Av= -1.5V/V
R
L
=1KΩ F=1KHz V
OUT
=±10V
NOTES:
1
2
3
4
5
6
AV= -1, measured in false summing junction circuit.
Guaranteed by design but not tested. Typical parameters are representative of actual device performance but are for reference only.
Industrial grade and "E" suffix devices shall be tested to subgroups 1 and 4 unless otherwise specified.
Military grade devices ("B" suffix) shall be 100% tested to subgroups 1,2,3 and 4.
Subgroups 5 and 6 testing available upon request.
T
A
=T
C
=+25°C
Subgroup 1,4
T
A
=T
C
=+125°C
Subgroup 2
T
A
=T
C
=-55°C
Subgroup 3
7 Measurement taken 0.5 seconds after application of power using automatic test equipment.
2
Rev. A 4/02
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±V
CC
I
OUT
V
IN
R
TH
Supply Voltage
Peak Output Current
Differential Input Voltage
Thermal Resistance
Junction to Case
Output Devices Only
+18V
±200mA
±12V
46°C/W
-65°C to +150°C
T
ST
Storage Temperature Range
300°C
T
LD
Lead Temperature Range
(10 Seconds Soldering)
See Curve
P
D
Power Dissipation
150°C
T
J
Junction Temperature
T
C
Case Operating Temperature Range
(MSK739B/E)
-55°C to+125°C
(MSK739)
-25°C to +85°C
APPLICATION NOTES
HEAT SINKING
To determine if a heat sink is necessary for your application and
if so, what type, refer to the thermal model and governing equation
below.
The value of the short circuit current limit resistors (±R
SC
) can
be calculated as follows.
+R
SC
=V
CC
-0.7/+I
SC
-
R
SC
=V
CC
+0.7/-I
SC
Thermal Model:
Short circuit current limit should be set at least 2X above the
highest normal operating output current to keep the value of RSC low
enough to ensure that the voltage dropped accross the short circuit
current limit resistor doesn't adversely affect normal operation.
INTERNAL FEEDBACK RESISTOR
T
J=
P
D
x
(R
θJC
+
R
θCS
+
R
θJC
)
+
T
A
Where
T
J=
Junction Temperature
P
D=
Total Power Dissipation
R
θJC=
Junction to Case Thermal Resistance
R
θCS=
Case to Heat Sink Thermal Resistance
R
θSA=
Heat Sink to Ambient Thermal Resistance
T
C=
Case Temperature
T
A=
Ambient Temperature
T
S=
Sink Temperature
Governing Equation:
The MSK 739 is equipped with an internal 1.5KΩ feedback resis-
tor. Bandwidth and slew rate can be optimized by connecting the
MSK 739 as shown in Figure 2. Placing the feedback resistor inside
the hybrid reduces printed circuit board trace length and its'
asscociated capacitance which acts as a capacitive load to the op-
amp output. Reducing the capacitive load allows the output to slew
faster and greater bandwidths will be realized. Refer to Table 1 for
recommended RIN values for various gains.
Example
:
This example demonstrates a worst case analysis for the op-amp
output stage. This occurs when the output voltage is 1/2 the power
supply voltage. Under this condition, maximum power transfer oc-
curs and the output is under maximum stress.
Conditions:
V
CC
=±16VDC
V
O
=±8Vp Sine Wave, Freq.=1KHz
R
L
=100
Ω
For a worst case analysis we will treat the +8Vp sine wave
as an 8VDC output voltage.
1.) Find Driver Power Dissapation
P
D
=(VCC-VO) (VO/RL)
=(16V-8V) (8V/100Ω)
=0.64W
2.) For conservative design, set T
J
=+125°C
3.) For this example, worst case T
A
=+90°C
4.) R
θJC
=45°C/W from MSK 739B Data Sheet
5.) R
θCS
=0.15°C/W for most thermal greases
6.) Rearrange governing equation to solve for R
θSA
R
θSA
=((
T
J
-
T
A
)/
P
D
) - (
R
θJC
) - (
R
θCS
)
=((125°C -90°C)/0.64W) - 45°C/W - 0.15°C/W
=54.7 - 46.15
=9.5°C/W
TABLE 1
APPROXIMATE
DESIRED GAIN
-1
-2
-10
R
IN
VALUE
1.5KΩ
750Ω
150Ω
Whenever the internal resistor is not being used it is good practice
to short pin 4 and 5 to avoid inadvertently picking up spurious sig-
nals.
Recommended External Component Selection
Guide Using External Rf
TABLE 2
APPROXIMATE
DESIRED GAIN
1
1
1
1
1
1
-1
-2
-5
-8
-10
-20
RI(+)
249Ω
160Ω
169Ω
100Ω
90.9Ω
100Ω
RI(-)
499Ω
249Ω
200Ω
124Ω
100Ω
100Ω
Rf(Ext)
499Ω
499Ω
1KΩ
1KΩ
1KΩ
2KΩ
Cf
2
2
2
2
2
2
The output section of the MSK 739 can be protected from direct
shorts to ground by placing current limit resistors between pins 1
and 12 and pins 9 and 10 as shown in Figure 1.
OUTPUT SHORT CIRCUIT PROTECTION
1 The positive input resistor is selected to minimize any bias current induced offset
voltage.
2 The feedback capacitor will help compensate for stray input capacitance. The value of
this capacitor can be dependent on individual applications. A 0.5 to 5pF capacitor is
usually optimum for most applications.
3 Effective load is RL in parallel with Rf.
3
Rev. A 4/02
APPLICATION NOTES CON'T
STABILITY AND LAYOUT CONSIDERATIONS
As with all wideband devices, proper decoupling of the power
lines is extremely important. The power supplies should be by-passed
as near to pins 9 and 1 as possible with a parallel grouping of a
0.01µf ceramic disc and a 4.7µf tantalum capacitor. Wideband de-
vices are also sensitive to printed cicuit board layout. Be sure to
keep all runs as short as possible, especially those associated with
the summing junction and power lines. Circuit traces should be sur-
rounded by ground planes whenever possible to reduce unwanted
resistance and inductance. The curve below shows the relationship
between resonant frequency and capacitor value for 3 trace lengths.
OPTIMIZING SLEW RATE
When measuring the slew rate of the MSK 739, many external
factors must be taken into consideration to achieve best results. The
closed loop gain of the test fixture should be -1.5V/V or less with
the external feedback resistor being 499Ω Lead length on this resis-
tor must be as short as possible and the resistor should be small. No
short circuit current limit resistors should be used. (Short pin 1 to
pin 12 and pin 9 to pin 10). Pins 2,3,7 and 8 should all be shorted
directly to ground for optimum response. Since the internal feedback
resistor isn't being used, pin 4 should be shorted to pin 5. SMA
connectors are recomended for the input and output connectors to
keep external capacitances to a minimum. To compensate for input
capacitance, a small 0.5 to 5pF high frequency variable capacitor
should be connected in parallel with the feedback resistor. This ca-
pacitor will be adjusted to trim overshoot to a minimum. A 5500V/
µS slew rate limit from -10V to +10V translates to a transition time
of 2.9 nanoseconds. In order to obtain a transition time of that mag-
nitude at the output of the test fixture, the transition time of the
input must be much smaller. A rise time at the input of 500 picosec-
onds or less is sufficient. If the transition time of the input is greater
than 500 picoseconds, the following formula should be used, since
the input transition time is now affecting the measured system tran-
sition time.
T
A
=
√
T
B
²+
T
C
²
WHERE:
T
A
=Transition time measured at output jack on MSK 739 test card.
T
B
=Transition time measured at input jack on MSK 739 test card.
T
C
=Actual output transition time of MSK 739(note that this quantity
will be calculated, not measured directly with the oscilloscope).
THE MSK 739 IS INVERTING, THEREFORE WHEN MEASURING RIS-
ING EDGE SLEW RATE:
FEEDBACK CAPACITANCE
Feedback capacitance is commonly used to compensate for the
"input capacitance" effects of amplifiers. Overshoot and ringing,
especially with capacitive loads, can be reduced or eliminated with
the proper value of feedback capacitance.
All capacitors have a self-resonant frequency. As capacitance in-
creases, self-resonant frequency decreases (assuming all other fac-
tors remain the same). Longer lead lengths and PC traces are other
factors that tend to decrease the self-resonant frequency. When a
feedback capacitor's self-resonant frequency falls within the fre-
quency band for which the amplifier under consideration has gain,
oscillation occurs. These influences place a practical upper limit on
the value of feedback capacitance that can be used. This value is
typically 0.5 to 5pF for the MSK 739(B).
T
A
=
Rise time measured at output
T
B
=
Fall time measured at input
T
C
=
Actual rise time of output
WHEN MEASURING FALLING EDGE SLEW RATE:
T
A
=Fall time measured at output
T
B
=Rise time measured at input
T
C
=Actual fall time of output
LOAD CONSIDERATIONS
When determining the load an amplifier will see, the capacitive
portion must be taken into consideration. For an amplifier that slews
at 1000V/µS, each pF will require 1mA of output current.
To minimize ringing with highly capacitive loads, reduce the load
time constant by adding shunt resistance.
I=C(dV/dT)
CASE CONNECTION
The MSK 739(B) has pin 3 internally connected to the case. The
case is not electrically connected to the internal circuit. Pin 3 should
be tied to a ground plane for sheilding. For special applications,
consult factory.
4
Rev. A 4/02
TYPICAL PERFORMANCE CURVES
5
Rev. A 4/02
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