LTC1043
Dual Precision
Instrumentation Switched Capacitor
Building Block
DESCRIPTIO
The LTC
®
1043 is a monolithic, charge-balanced, dual
switched capacitor instrumentation building block. A pair
of switches alternately connects an external capacitor to
an input voltage and then connects the charged capacitor
across an output port. The internal switches have a
break-before-make action. An internal clock is provided
and its frequency can be adjusted with an external
capacitor. The LTC1043 can also be driven with an external
CMOS clock.
The LTC1043, when used with low clock frequencies,
provides ultra precision DC functions without requiring
precise external components. Such functions are
differential voltage to single-ended conversion, voltage
inversion, voltage multiplication and division by 2, 3, 4, 5,
etc. The LTC1043 can also be used for precise V–F and
F–V circuits without trimming, and it is also a building
block for switched capacitor filters, oscillators and
modulators.
The LTC1043 is manufactured using Linear Technology’s
enhanced LTCMOS
TM
silicon gate process.
, LTC and LT are registered trademarks of Linear Technology Corporation.
LTCMOS is a trademark of Linear Technology Corporation.
FEATURES
■
■
■
■
■
■
■
Instrumentation Front End with 120dB CMRR
Precise, Charge-Balanced Switching
Operates from 3V to 18V
Internal or External Clock
Operates up to 5MHz Clock Rate
Low Power
Two Independent Sections with One Clock
APPLICATIO S
■
■
■
■
■
Precision Instrumentation Amplifiers
Ultra Precision Voltage Inverters, Multipliers
and Dividers
V–F and F–V Converters
Sample-and-Hold
Switched Capacitor Filters
TYPICAL APPLICATIO
5V
4
7
8
Instrumentation Amplifier
140
5V
3
1µF
C
H
11
DIFFERENTIAL
INPUT
C
S
12
1µF
13
14
R1
16
0.01µF
17
LTC1043 • TA01
C
S
= C
H
= 1µF
+
–
8
1
V
OUT
CMRR (dB)
120
100
80
60
40
20
100
1/2 LTC1013
2
4
–5V
1µF
(EXTERNAL)
R2
1/2 LTC1043
CMRR > 120dB AT DC
CMRR > 120dB AT 60Hz
DUAL SUPPLY OR SINGLE 5V
GAIN = 1 + R2/R1
V
OS
≈
150µV
∆
V
OS
≈
2µV/°C
∆
T
COMMON MODE INPUT VOLTAGE INCLUDES THE SUPPLIES
1k
10k
100k
FREQUENCY OF COMMON MODE SIGNAL
LTC1043 • TA02
–5V
U
U
U
CMRR vs Frequency
1043fa
1
LTC1043
ABSOLUTE
(Note 1)
AXI U
RATI GS
PACKAGE/ORDER I FOR ATIO
TOP VIEW
SH
B
C
B+
C
B–
V
+
S2B
S1B
S1A
S2A
NC
1
2
3
4
5
6
7
8
9
18 S3B
17 V
–
16 C
OSC
15 S4B
14 S4A
13 S3A
12 C
A–
11 C
A+
10 SH
A
Supply Voltage ........................................................ 18V
Input Voltage at Any Pin .......... –0.3V
≤
V
IN
≤
V
+
+ 0.3V
Operating Temperature Range
LTC1043C ................................... –40°C
≤
T
A
≤
85°C
LTC1043M
(OBSOLETE).............–
55°C
≤
T
A
≤
125°C
Storage Temperature Range ................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
ORDER PART
NUMBER
LTC1043CN
LTC1043CSW
SW PACKAGE
18-LEAD PLASTIC SO
T
JMAX
= 100°C,
θ
JA
= 100°C/W
PACKAGE (N)
T
JMAX
= 150°C,
θ
JA
= 85°C/W PACKAGE (SW)
D PACKAGE
18-LEAD SIDE BRAZED (HERMETIC)
N PACKAGE
18-LEAD PDIP
LTC1043MD
OBSOLETE PACKAGE
Consider the N18 Package as an Alternate Source
LTC1043 • POI01
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
+
range, otherwise specifications are at T
A
= 25°C. V
–40°C
≤
T
A
≤
85°C, unless otherwise noted.
SYMBOL PARAMETER
I
S
Power Supply Current
CONDITIONS
The
●
denotes specifications which apply over the full operating temperature
–
= 0V, LTC1043M operates from –55°C
≤
T
≤
125°C; LTC1043C operates from
= 10V, V
A
LTC1043M
MIN TYP MAX
0.25
●
LTC1043C
MIN TYP MAX
0.25
0.4
6
6
240
400
185
34
40
25
75
5
120
0.4
0.7
0.65
1
100
400
700
700
1
50
75
70
100
UNITS
mA
mA
mA
mA
pA
nA
Ω
Ω
Ω
kΩ
kHz
kHz
kHz
µA
µA
ns
ns
MHz
dB
Pin 16 Connected High or Low
C
OSC
(Pin 16 to V
–
) = 100pF
●
0.4
0.7
0.65
1
100
500
400
700
700
1
50
75
70
100
20
15
0.4
6
6
240
●
I
I
R
ON
R
ON
f
OSC
OFF Leakage Current
ON Resistance
ON Resistance
Internal Oscillator Frequency
Any Switch, Test Circuit 1 (Note 2)
●
Test Circuit 2, V
IN
= 7V, 1 =
±0.5mA
V
+
= 10V, V
–
= 0V
Test Circuit 2, V
IN
= 3.1V, 1 =
±0.5mA
V
+
= 5V, V
–
= 0V
C
OSC
(Pin 16 to V
–
) = 0pF
C
OSC
(Pin 16 to V
–
) = 100pF
Test Circuit 3
Pin 16 at V
+
or V
–
400
●
●
●
20
15
185
34
40
25
I
OSC
Pin Source or Sink Current
Break-Before-Make Time
Clock to Switching Delay
C
OSC
Pin Externally Driven
C
OSC
Pin Externally Driven with CMOS Levels
V
+
= 5V, V
–
= –5V, –5V < V
CM
< 5V
DC to 400Hz
75
5
120
f
M
CMRR
Max External CLK Frequency
Common Mode Rejection Ratio
Note 1:
Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2:
OFF leakage current is guaranteed but not tested at 25°C.
1043fa
2
U
W
U
U
W W
W
LTC1043
TYPICAL PERFOR A CE CHARACTERISTICS
Power Supply Current vs
Power Supply Voltage
1.6
T
A
= –55°C
C
OSC
= 0pF
1.4
C
OSC
= 0.0047pF
SUPPLY CURRENT (mA)
1.2
1.0
0.8
R
ON
(Ω)
R
ON
(Ω)
T
A
= 25°C
C
OSC
= 0pF
C
OSC
= 0.0047pF
T
A
= 125°C
C
OSC
= 0pF
0.6
C
OSC
= 0.0047pF
0.4
0.2
0
0
2
4
6
8 10 12 14 16 18 20
V
SUPPLY
(V)
LTC1043 • TPC01
R
ON
vs V
IN
260
240
220 V
IN
200
R
ON
(Ω)
R
ON
(Ω)
180
160
140
120
100
80
0
2
4
6
8
10 12 14 16 18 20
V
IN
(V)
LTC1043 • TPC04
R
ON
(PEAK)
I = 100µA
V+ = 15V
V – = 0V
T
A
= 25°C
I = 100µA
I = mA
500
400
300
200
100
0
0
R
ON
(Ω)
Oscillator Frequency, f
OSC
vs C
OSC
1M
T
A
= 25°C
100k
200
175
f
OSC
(kHz)
V+ = 10V, V – = 0V
V+ = 5V, V – = 0V
V+ = 15V, V – = 0V
OSCILLATOR FREQUENCY
NORMALIZED TO f
OSC
AT 5V SUPPLY
f
OSC
(Hz)
10k
1k
100
0
2k
4k
6k
C
OSC
(pF)
8k
10k
U W
LTC1043 • TPC07
(Test Circuits 2 through 4)
R
ON
vs V
IN
550
500
450 V
IN
400
350
300
250
200
150
100
0
1
2
V
IN
(V)
LTC1043 • TPC02
R
ON
vs V
IN
V+ = 5V
V – = 0V
T
A
= 25°C
280
260
240 V
IN
220
200
180
160
140
120
100
3
4
5
0
1
2
3
4
5 6
V
IN
(V)
7
8
9
10
I = 100µA
I = mA
R
ON
(PEAK)
I = 100µA
V+ = 10V
V – = 0V
T
A
= 25°C
R
ON
(PEAK)
I = 100µA
I = 100µA
I = mA
LTC1043 • TPC03
R
ON
(Peak) vs Power Supply
Voltage
1000
900
800
700
600
V
IN
≈
3.2V
V
IN
≈
7V
3V
≤
V+ +
≤18V
V – = 0V
T
A
= 25°C
2
4
6
V
IN
= 1.6V
V
IN
R
ON
(PEAK)
I = 100µA
1100
1000
900
800
700
600
500
400
300
200
100
R
ON
(Peak) vs Power Supply
Voltage and Temperature
R
ON
(PEAK)
V
IN
I = 100µA
T
A
= 125°C
V
IN
≈
11V
T
A
= 70°C
T
A
= –55°C
0
2
4
6
8 10 12 14 16 18 20
V
SUPPLY
(V)
LTC1043 • TPC06
V
IN
≈
15.1V
8 10 12 14 16 18 20
V
SUPPLY
(V)
LTC1043 • TPC05
Oscillator Frequency, f
OSC
vs Supply Voltage
250
225
T
A
= 25°C
2.0
1.8
1.6
1.4
1.2
1
0.8
0.6
0.4
0.2
0
0
Normalized Oscillator Frequency,
f
OSC
vs Supply Voltage
0pF < C
OSC
< 0.01µF
T
A
= 25°C
C
OSC
= 0pF
150
125
100
75
50
25
0
2
4
6
8 10 12 14 16 18 20
V
SUPPLY
(V)
LTC1043 • TPC08
C
OSC
= 100pF
2
4
6
8 10 12 14 16 18 20
V
SUPPLY
(V)
LTC1043 • TPC09
1043fa
3
LTC1043
TYPICAL PERFOR A CE CHARACTERISTICS
Oscillator Frequency, f
OSC
vs Ambient Temperature, T
A
350
325
300
275
f
OSC
(kHz)
250
225
200
175
150
125
V
+
= 5V, V
–
= 0V
+
–
PIN 16 SOURCE OR SINK CURRENT (µA)
C
OSC
= 0pF
t
NOV
(ns)
V
+
= 10V, V
–
= 0V
V = 15V, V = 0V
100
50
25
0
75 100
–50 –25
AMBIENT TEMPERATURE (°C)
LTC1043 • TPC10
BLOCK DIAGRA
4
U W
125
(Test Circuits 2 through 4)
Break-Before-Make Time, t
NOV
,
vs Supply Voltage
80
T
A
= 25°C
70
60
50
40
30
C
OSC
Pin I
SINK
, I
SOURCE
vs Supply Voltage
100
I
SINK,
T
A
= –55°C
75
I
SINK,
T
A
= 25°C
50
I
SOURCE,
T
A
= –55°C
I
SOURCE,
T
A
= 25°C
25
I
SINK,
T
A
= 125°C
I
SOURCE,
T
A
= 125°C
0
0
2
4
6
8
10
12
14
16
18
20
10
0
2
4
6
8 10 12 14 16 18 20
V
SUPPLY
(V)
LTC1043 • TPC12
LTC1043 • TPC11
W
S1A
7
S2A
8
SH
A
10
11 C
A+
12 C
A–
S3A
13
CHARGE
BALANCING
CIRCUITRY
S4A
14
S1B
6
S2B
5
SH
B
1
2 C
B+
3 C
B–
S3B
18
CHARGE
BALANCING
CIRCUITRY
S4B
15
NON-OVERLAPPING
CLOCK
V
+
V
–
C
OSC
16
V
+
4
V
–
17
OSCILLATOR
THE CHARGE BALANCING CIRCUITRY SAMPLES THE VOLTAGE
AT S3 WITH RESPECT TO S4 (PIN 16 HIGH) AND INJECTS A
SMALL CHARGE AT THE C
+
PIN (PIN 16 LOW).
THIS BOOSTS THE CMRR WHEN THE LTC1043 IS USED AS AN
INSTRUMENTATION AMPLIFIER FRONT END.
FOR MINIMUM CHARGE INJECTION IN OTHER TYPES OF
APPLICATIONS, S3A AND S3B SHOULD BE GROUNDED
THE SWITCHES ARE TIMED AS SHOWN WITH PIN 16 HIGH
LTC1043 • BD01
1043fa
LTC1043
TEST CIRCUITS
Test Circuit 1. Leakage Current Test
(7, 13, 6, 18)
(8, 14, 5, 15)
NOTE: TO OPEN SWITCHES,
S1 AND S3
SHOULD BE CONNECTED
TO V –. TO OPEN S2, S4,
C
OSC
PIN SHOULD BE
TO V+ C
OSC
LTC1043 • TC01
Test Circuit 2. R
ON
Test
(7, 13, 6, 18)
(8, 14, 5, 15)
A
+
0V TO 10V
+
(11, 12, 2, 3)
VIN
(11, 12, 2, 3)
100µA to 1mA
CURRENT SOURCE
A
LTC1043 • TC02
Test Circuit 3. Oscillator Frequency, f
OSC
Test Circuit 4. CMRR Test
7
8
V
OUT
(TEST PIN) 2
V+
V–
17
C
OSC
16
10
11
+
4
LTC1043
+
1µF
1µF
CAPACITORS ARE
NOT ELECTROLYTIC
5
12
+
6
IV
LTC1043 • TC03
13
14
+
V
–
≤
V
CM
≤
V
+
CMRR = 20 LOG
( )
V
CM
V
OUT
LTC1043 • TC04
NOTE: FOR OPTIMUM CMRR, THE C
OSC
SHOULD
BE LARGER THAN 0.0047µF, AND
THE SAMPLING CAPACITOR ACROSS
PINS 11 AND 12 SHOULD BE PLACED
OVER A SHIELD TIED TO PIN 10
APPLICATIO S I FOR ATIO
Common Mode Rejection Ratio (CMRR)
The LTC1043, when used as a differential to single-ended
converter rejects common mode signals and preserves
differential voltages (Figure 1). Unlike other techniques,
the LTC1043’s CMRR does not degrade with increasing
common mode voltage frequency. During the sampling
mode, the impedance of Pins 2, 3 (and 11, 12) should be
reasonably balanced, otherwise, common mode signals
will appear differentially. The value of the CMRR depends
on the value of the sampling and holding capacitors
(C
S
, C
H
) and on the sampling frequency. Since the
common mode voltages are not sampled, the
common mode signal frequency can well exceed the
sampling frequency without experiencing aliasing
phenomena. The CMRR of Figure 1 is measured by
U
1/2 LTC1043
7
8
C
+
11
V
D
W
U U
+
+
C
S
C
–
12
V
D
C
H
13
V
CM
14
+
C
S
, C
H
ARE MYLAR OR POLYSTRENE
LTC1043 • AI01
Figure 1. Differential to Single-Ended Converter
1043fa
5
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