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74ACTQ373SJ

Description
Quiet Series⑩ Octal Transparent Latch with 3-STATE Outputs
Categorylogic    logic   
File Size307KB,13 Pages
ManufacturerFairchild
Websitehttp://www.fairchildsemi.com/
Environmental Compliance
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74ACTQ373SJ Overview

Quiet Series⑩ Octal Transparent Latch with 3-STATE Outputs

74ACTQ373SJ Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerFairchild
Parts packaging codeSOIC
package instructionSOP, SOP20,.3
Contacts20
Reach Compliance Codecompli
seriesACT
JESD-30 codeR-PDSO-G20
JESD-609 codee3
length12.6 mm
Load capacitance (CL)50 pF
Logic integrated circuit typeBUS DRIVER
MaximumI(ol)0.024 A
Humidity sensitivity level1
Number of digits8
Number of functions1
Number of ports2
Number of terminals20
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output characteristics3-STATE
Output polarityTRUE
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Encapsulate equivalent codeSOP20,.3
Package shapeRECTANGULAR
Package formSMALL OUTLINE
method of packingRAIL
Peak Reflow Temperature (Celsius)260
power supply5 V
Prop。Delay @ Nom-Su8 ns
propagation delay (tpd)9 ns
Certification statusNot Qualified
Maximum seat height2.1 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceMatte Tin (Sn)
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width5.3 mm
Base Number Matches1
74ACQ373, 74ACTQ373 Quiet Series™ Octal Transparent Latch with 3-STATE Outputs
April 2007
74ACQ373, 74ACTQ373
Quiet Series™ Octal Transparent Latch with 3-STATE
Outputs
Features
I
CC
and I
OZ
reduced by 50%
Guaranteed simultaneous switching noise level and
tm
General Description
The ACQ/ACTQ373 consists of eight latches with
3-STATE outputs for bus organized system applications.
The latches appear transparent to the data when Latch
Enable (LE) is HIGH. When LE is LOW, the data satisfy-
ing the input timing requirements is latched. Data
appears on the bus when the Output Enable (OE) is
LOW. When OE is HIGH, the bus output is in the HIGH
impedance state.
The ACQ/ACTQ373 utilizes Fairchild Quiet Series™
technology to guarantee quiet output switching and
improve dynamic threshold performance. features
GTO™ output control and undershoot corrector in addi-
tion to a split ground bus for superior performance.
dynamic threshold performance
Guaranteed pin-to-pin skew AC performance
Improved latch up immunity
Eight latches in a single package
3-STATE outputs drive bus lines or buffer memory
address registers
Outputs source/sink 24mA
Faster prop delays than the standard AC/ACT373
Ordering Information
Order
Number
74ACQ373SC
74ACQ373SJ
74ACTQ373SC
74ACTQ373SJ
74ACQT373QSC
Package
Number
M20B
M20D
M20B
M20D
MQA20
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150” Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
Connection Diagram
Pin Descriptions
Pin Names
D
0
–D
7
LE
OE
O
0
–O
7
Data Inputs
Latch Enable Input
Output Enable Input
3-STATE Latch Outputs
Description
FACT™, Quiet Series™, FACT Quiet Series™, and GTO™ are trademarks of Fairchild Semiconductor Corporation.
©1989 Fairchild Semiconductor Corporation
74ACQ373, 74ACTQ373 Rev. 1.3
www.fairchildsemi.com

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