MC74AC253, MC74ACT253
Dual 4-Input Multiplexer
with 3-State Outputs
The MC74AC253/74ACT253 is a dual 4−input multiplexer with
3−state outputs. It can select two bits of data from four sources using
common select inputs. The outputs may be individually switched to a
high impedance state with a HIGH on the respective Output Enable
(OE) inputs, allowing the outputs to interface directly with bus
oriented systems.
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MARKING
DIAGRAMS
16
16
1
SOIC−16
D SUFFIX
CASE 751B
1
16
V
CC
16
OE
b
15
S
0
14
I
3b
13
I
2b
12
I
1b
11
I
0b
10
Z
b
9
16
1
TSSOP−16
DT SUFFIX
CASE 948F
1
xxx
= AC or ACT
A
= Assembly Location
WL or L = Wafer Lot
Y
= Year
WW or W = Work Week
G or
G
= Pb−Free Package
(Note: Microdot may be in either location)
xxx
253
ALYWG
G
xxx253G
AWLYWW
•
•
•
•
•
Multifunctional Capability
Noninverting 3−State Outputs
Outputs Source/Sink 24 mA
′ACT253
Has TTL Compatible Inputs
These are Pb−Free Devices
1
OE
a
2
S
1
3
I
3a
4
I
2a
5
I
1a
6
I
0a
7
Z
a
8
GND
Figure 1. Pinout: 16−Lead Packages Conductors
(Top View)
PIN NAME
PIN
I
0a
−I
3a
I
0b
−I
3b
S
0
, S
1
OE
a
OE
b
Z
a,
Z
b
FUNCTION
Side A Data Inputs
Side B Data Inputs
Common Select Inputs
Side A Output Enable Input
Side B Output Enable Input
3−State Outputs
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
©
Semiconductor Components Industries, LLC, 2015
1
March, 2015 − Rev. 7
Publication Order Number:
MC74AC253/D
MC74AC253, MC74ACT253
TRUTH TABLE
Select
Inputs
S
0
X
L
L
H
H
L
L
H
H
S
1
X
L
L
L
L
H
H
H
H
I
0
X
L
H
X
X
X
X
X
X
Data Inputs
I
1
X
X
X
L
H
X
X
X
X
I
2
X
X
X
X
X
L
H
X
X
I
3
X
X
X
X
X
X
X
L
H
Output
Enable
OE
H
L
L
L
L
L
L
L
L
Outputs
Z
Z
L
H
L
H
L
H
L
H
OE
a
I
0a
I
1a
I
2a
I
3a
I
0b
I
1b
I
2b
I
3b
OE
b
S
0
S
1
Z
a
Z
b
Figure 2. Logic Symbol
Address inputs S
0
and S
1
are common to both sections.
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
FUNCTIONAL DESCRIPTION
The MC74AC253/74ACT253 contains two identical
4−input multiplexers with 3−state outputs. They select two
bits from four sources selected by common Select inputs (S
0
,
S
1
). The 4−input multiplexers have individual Output
Enable (OE
a
, OE
b
) inputs which, when HIGH, force the
outputs to a high impedance (High Z) state. This device is the
logic implementation of a 2−pole, 4−position switch, where
the position of the switch is determined by the logic levels
supplied to the two select inputs. The logic equations for the
outputs are shown:
Z
a
= OE
a
•
(I
0a
•
S
1
•
S
0
+I
1a
•
S
1
•
S
0
+
I
2a
•
S
1
•
S
0
+I
3a
•
S
1
•
S
0
)
Z
b
= OE
b
•
(I
0b
•
S
1
•
S
0
+I
1b
•
S
1
•
S
0
+
I
2b
•
S
1
•
S
0
+I
3b
•
S
1
•
S
0
)
If the outputs of 3−state devices are tied together, all but
one device must be in the high impedance state to avoid high
currents that would exceed the maximum ratings. Designers
should ensure that Output Enable signals to 3−state devices
whose outputs are tied together are designed so that there is
no overlap.
S
1
I
3a
I
2a
I
1a
I
0a
OE
a
OE
b
I
3b
I
2b
I
1b
I
0b
S
0
Z
b
NOTE:
Z
a
This diagram is provided only for the understanding of logic operations
and should not be used to estimate propagation delays.
Figure 3. Logic Diagram
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2
MC74AC253, MC74ACT253
MAXIMUM RATINGS
Symbol
V
CC
V
I
V
O
I
IK
I
OK
I
O
I
CC
I
GND
T
STG
T
L
T
J
q
JA
P
D
MSL
F
R
V
ESD
DC Supply Voltage
DC Input Voltage
DC Output Voltage (Note 1)
DC Input Diode Current
DC Output Diode Current
DC Output Sink/Source Current
DC Supply Current per Output Pin
DC Ground Current per Output Pin
Storage Temperature Range
Lead temperature, 1 mm from Case for 10 Seconds
Junction temperature under Bias
Thermal Resistance (Note 2)
Power Dissipation in Still Air at 65°C (Note 3)
Moisture Sensitivity
Flammability Rating
ESD Withstand Voltage
Oxygen Index: 30% − 35%
Human Body Model (Note 4)
Machine Model (Note 5)
Charged Device Model (Note 6)
Above V
CC
and Below GND at 85°C (Note 7)
SOIC
TSSOP
SOIC
TSSOP
Parameter
Value
−0.5 to +7.0
*0.5
≤
V
CC
+0.5
*0.5
≤
V
CC
+0.5
±20
±50
±50
±50
±50
−65 to +150
260
+150
69.1
103.8
500
500
Level 1
UL 94 V−0 @ 0.125 in
> 2000
> 200
> 1000
±100
V
Unit
V
V
V
mA
mA
mA
mA
mA
°C
°C
°C
°C/W
mW
I
Latch−Up
Latch−Up Performance
mA
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. I
O
absolute maximum rating must be observed.
2. The package thermal impedance is calculated in accordance with JESD51−7.
3. 500 mW at 65°C; derate to 300 mW by 10 mW/ from 65°C to 85°C.
4. Tested to EIA/JESD22−A114−A.
5. Tested to EIA/JESD22−A115−A.
6. Tested to JESD22−C101−A.
7. Tested to EIA/JESD78.
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
IN
, V
OUT
Supply Voltage
DC Input Voltage, Output Voltage (Ref. to GND)
V
CC
@ 3.0 V
t
r
, t
f
Input Rise and Fall Time (Note 1)
′AC
Devices except Schmitt Inputs
Input Rise and Fall Time (Note 2)
′ACT
Devices except Schmitt Inputs
Operating Ambient Temperature Range
Output Current − High
Output Current − Low
V
CC
@ 4.5 V
V
CC
@ 5.5 V
t
r
, t
f
T
A
I
OH
I
OL
V
CC
@ 4.5 V
V
CC
@ 5.5 V
Parameter
′AC
′ACT
Min
2.0
4.5
0
−
−
−
−
−
−40
−
−
Typ
5.0
5.0
−
150
40
25
10
8.0
25
−
−
Max
6.0
5.5
V
CC
−
−
−
−
ns/V
−
85
−24
24
°C
mA
mA
ns/V
V
V
Unit
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
1. V
IN
from 30% to 70% V
CC
; see individual Data Sheets for devices that differ from the typical input rise and fall times.
2. V
IN
from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.
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3
MC74AC253, MC74ACT253
DC CHARACTERISTICS
74AC
Symbol
Parameter
V
CC
(V)
T
A
= +25°C
Typ
V
IH
Minimum High Level
Input Voltage
Maximum Low Level
Input Voltage
Minimum High Level
Output Voltage
3.0
4.5
5.5
3.0
4.5
5.5
3.0
4.5
5.5
3.0
4.5
5.5
V
OL
Maximum Low Level
Output Voltage
3.0
4.5
5.5
3.0
4.5
5.5
I
IN
I
OZ
Maximum Input
Leakage Current
Maximum
3−State
Current
†Minimum Dynamic
Output Current
Maximum Quiescent
Supply Current
5.5
1.5
2.25
2.75
1.5
2.25
2.75
2.99
4.49
5.49
−
−
−
0.002
0.001
0.001
−
−
−
−
74AC
T
A
=
−40°C to
+85°C
Unit
Conditions
Guaranteed Limits
2.1
3.15
3.85
0.9
1.35
1.65
2.9
4.4
5.4
2.56
3.86
4.86
0.1
0.1
0.1
0.36
0.36
0.36
±0.1
2.1
3.15
3.85
0.9
1.35
1.65
2.9
4.4
5.4
2.46
3.76
4.76
0.1
0.1
0.1
0.44
0.44
0.44
±1.0
V
V
OUT
= 0.1 V
or V
CC
− 0.1 V
V
OUT
= 0.1 V
or V
CC
− 0.1 V
I
OUT
= −50
μA
V
*V
IN
= V
IL
or V
IH
−12 mA
I
OH
−24 mA
−24 mA
I
OUT
= 50
μA
V
*V
IN
= V
IL
or V
IH
12 mA
I
OL
24 mA
24 mA
V
I
= V
CC
, GND
V
I
(OE) = V
IL
, V
IH
V
I
= V
CC
, GND
V
O
= V
CC
, GND
V
OLD
= 1.65 V Max
V
OHD
= 3.85 V Min
V
IN
= V
CC
or GND
V
IL
V
V
OH
V
V
μA
5.5
5.5
5.5
5.5
−
−
−
−
±0.5
−
−
8.0
±5.0
75
−75
80
μA
mA
mA
μA
I
OLD
I
OHD
I
CC
*All outputs loaded; thresholds on input associated with output under test.
†Maximum test duration 2.0 ms, one output loaded at a time.
NOTE: I
IN
and I
CC
@ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V V
CC
.
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4
MC74AC253, MC74ACT253
AC CHARACTERISTICS
(For Figures and Waveforms − See Section 3 of the ON Semiconductor FACT Data Book, DL138/D)
74AC
Symbol
Parameter
V
CC
*
(V)
Min
t
PLH
t
PHL
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
Propagation Delay
S
n
to Z
n
Propagation Delay
S
n
to Z
n
Propagation Delay
I
n
to Z
n
Propagation Delay
I
n
to Z
n
Output Enable Time
Output Enable Time
Output Disable Time
Output Disable Time
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
2.0
2.0
2.5
2.0
1.5
1.5
2.0
1.5
1.5
1.5
1.5
1.5
2.0
2.0
1.5
1.5
T
A
= +25°C
C
L
= 50 pF
Typ
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
Max
15.5
11.0
16.0
11.5
14.5
10.0
13.0
9.5
8.0
6.0
8.0
6.0
9.5
8.0
8.0
7.0
74AC
T
A
= −40°C
to +85°C
C
L
= 50 pF
Min
2.0
1.5
2.0
1.5
1.5
1.5
1.5
1.5
1.0
1.0
1.0
1.0
1.5
1.5
1.0
1.0
Max
17.5
12.5
18.0
13.0
17.0
11.5
15.0
11.0
8.5
6.5
9.0
7.0
10.0
8.5
9.0
7.5
ns
ns
ns
ns
ns
ns
ns
ns
3−6
3−6
3−5
3−5
3−7
3−8
3−7
3−8
Unit
Fig.
No.
*Voltage Range 3.3 V is 3.3 V
±0.3
V.
*Voltage Range 5.0 V is 5.0 V
±0.5
V.
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