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SIT3821AC-2C3-33EE125.000000T

Description
LVDS Output Clock Oscillator,
CategoryPassive components    oscillator   
File Size275KB,7 Pages
ManufacturerSiTime
Environmental Compliance  
Download Datasheet Parametric View All

SIT3821AC-2C3-33EE125.000000T Overview

LVDS Output Clock Oscillator,

SIT3821AC-2C3-33EE125.000000T Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
Objectid8285413300
Reach Compliance Codecompliant
Country Of OriginMalaysia, Taiwan, Thailand
YTEOL3
Other featuresENABLE/DISABLE FUNCTION; COMPLEMENTARY OUTPUT; TR
Maximum control voltage3.2 V
Minimum control voltage0.1 V
maximum descent time0.6 ns
Frequency Adjustment - MechanicalNO
Frequency offset/pull rate100 ppm
frequency stability50%
linearity1%
Installation featuresSURFACE MOUNT
Nominal operating frequency125 MHz
Maximum operating temperature70 °C
Minimum operating temperature-20 °C
Oscillator typeLVDS
Output load100 OHM
physical size5.0mm x 3.2mm x 0.75mm
longest rise time0.6 ns
Maximum supply voltage3.63 V
Minimum supply voltage2.97 V
Nominal supply voltage3.3 V
surface mountYES
maximum symmetry55/45 %
SiT3821
1-220 MHz High Performance Differential VCXO
The Smart Timing Choice
The Smart Timing Choice
Features
Applications
Any frequency between 1 MHz and 220 MHz accurate to 6 decimal
places
Widest pull range options: ±25, ±50, ±100, ±150, ±200, ±400, ±800,
±1600 ppm
Superior pull range linearity of ≤ 1%, 10 times better than quartz
0.6ps RMS phase jitter (random) over 12 kHz to 20 MHz bandwidth
Industrial and extended commercial temperature ranges
Industry-standard packages: 3.2 mm x 2.5 mm, 5.0 mm x 3.2 mm and
7.0 mm x 5.0 mm
For frequencies higher than 220 MHz, refer to SiT3822 datasheet
Ideal for SONET, Video, Instrumentation, Satellite applications
Telecom, networking, broadband
Electrical Characteristics
Parameter and Conditions
Output Frequency Range
Frequency Stability
Symbol
f
F_stab
Min.
1
-10
-25
-50
Operating Temperature Range
Start-up Time
Duty Cycle
Pull Range
Upper Control Voltage
Lower Control Voltage
Linearity
Frequency Change Polarity
Control Voltage Bandwidth (-3dB)
Vin Pin Input Impedance
First Year Aging
10-year Aging
Supply Voltage
Current Consumption
OE Disable Supply Current
Output Disable Leakage Current
Maximum Output Current
Output High Voltage
Output Low Voltage
Output Differential Voltage Swing
Rise/Fall Time
OE Enable/Disable Time
RMS Period Jitter
Vdd
Idd
I_OE
I_leak
I-driver
VOH
VOL
V_Swing
Tr, Tf
T_oe
T_jitt
T_use
T_start
DC
PR
VC_U
VC_L
Lin
V_BW
Z_vin
100
-2
-5
2.97
2.25
Vdd-1.1
Vdd-1.9
1.2
-40
-20
45
Typ.
Max.
220
+10
+25
+50
+85
+70
10
55
Unit
MHz
ppm
ppm
ppm
°C
°C
ms
%
ppm
V
V
V
%
+2
+5
3.63
2.75
69
35
1
30
Vdd-0.7
Vdd-1.5
2.0
500
115
1.7
1.7
1.7
0.75
kHz
ppm
ppm
V
V
mA
mA
A
mA
V
V
V
ps
ns
ps
ps
ps
ps
Contact SiTime for 16 kHz or other high bandwidth options
Pin 1
25°C
25°C
Industrial
Extended Commercial
Contact SiTime for tighter duty cycle
See the last page for Absolute Pull Range, APR table
Vdd = 3.3V, Voltage at which maximum deviation is guaranteed
Vdd = 2.5V, Voltage at which maximum deviation is guaranteed
Voltage at which maximum deviation is guaranteed
Condition
LVPECL and LVDS, Common AC Characteristics
Inclusive of initial tolerance, operating temperature, rated
power, supply voltage and load change
±25, ±50, ±100, ±150,
±200, ±400, ±800, ±1600
3.2
2.4
Positive Slope
8
3.3
2.5
61
1.6
300
1.2
1.2
1.2
0.5
0.1
1
LVPECL, DC and AC Characteristics
Excluding Load Termination Current, Vdd = 3.3V or 2.5V
OE = Low
OE = Low
Maximum average current drawn from OUT+ or OUT-
See Figure 1
See Figure 1
See Figure 1
20% to 80%
f = 220 MHz - For other frequencies, T_oe = 100ns + 3 period
f = 100 MHz, Vdd = 3.3V or 2.5V
f = 156.25 MHz, Vdd = 3.3V or 2.5V
f = 212.5 MHz, Vdd = 3.3V or 2.5V
f = 156.25 MHz, Integration bandwidth = 12 kHz to 20 MHz, all
Vdds
RMS Phase Jitter (random)
T_phj
SiTime Corporation
Rev. 1.2
990 Almanor Avenue
Sunnyvale, CA 94085
(408) 328-4400
www.sitime.com
Revised October 6, 2014

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