EEWORLDEEWORLDEEWORLD

Part Number

Search

B43231E2687M

Description
CAP ALUM 680UF 20% 250V SNAP
CategoryPassive components   
File Size941KB,23 Pages
ManufacturerEPCOS (TDK)
Environmental Compliance
Download Datasheet Parametric View All

B43231E2687M Overview

CAP ALUM 680UF 20% 250V SNAP

B43231E2687M Parametric

Parameter NameAttribute value
capacitance680µF
Tolerance±20%
Voltage - Rated250V
ESR (equivalent series resistance)-
Service life at different temperatures2000 hours at 85°C
Operating temperature-40°C ~ 85°C
polarizationpolarization
grade-
applicationUniversal
Ripple current @ low frequency2.56A @ 120Hz
Ripple current @ high frequency3.968A @ 20kHz
lead spacing0.394"(10.00mm)
size/dimensions1.181" diameter (30.00mm)
Height - Installation (maximum)1.457"(37.00mm)
Surface mount pad dimensions-
Installation typeThrough hole
Package/casingRadial, Can - snap-in
Aluminum electrolytic capacitors
Alu-X product lines
Snap-in capacitors
Series/Type:
Date:
Data Sheet
B41231, B43231
April 2008
©
EPCOS AG 2008. Reproduction, publication and dissemination of this publication and the infor-
mation contained therein without EPCOS’ prior express consent is prohibited.
Google releases major update to Chrome OS interface
[i=s]This post was last edited by jameswangsynnex on 2015-3-3 20:03[/i]...
wstt Mobile and portable
Does TI have a calculator for fully differential op amps?
The official website is a wrong page. Can anyone give me a link to a similar tool? It's a bit difficult to calculate manually......
飞鸿浩劫 Analogue and Mixed Signal
After the Windows Mobile phone goes into sleep mode, the timer will no longer be triggered. Is there any solution?
I recently developed a mobile app that requires a timer, but when the phone goes into sleep mode, the timer will no longer be triggered. Is there any solution?...
smallriver Embedded System
The maximum SPI speed reaches 18MHz. Is 18MHZ bits or bytes?
Does anyone know that the maximum SPI speed reaches 18MHz? Is 18MHZ bits or bytes? Thank you...
ardentyears stm32/stm8
ModelSim simulation PLL module Altera FPGA (transfer)
Since we need to debug the FPGA reading and writing SDRAM project, the first step is to verify the function of the PLL module. Therefore, we combined some information found on the Internet and conduct...
chenzhufly FPGA/CPLD
ARM architecture
ARM architecture goodies shared...
黑衣人 ARM Technology

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 2497  602  1674  1817  335  51  13  34  37  7 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号