570ABA000121DGR datasheet, PDF

Datasheet> All Categories > Passive components> 570ABA000121DGR

570ABA000121DGR: DescriptionANY, I2C PROGRAMMABLE XO; CategoryPassive components; File Size562KB，36 Pages; ManufacturerSilicon Laboratories Inc

Download Datasheet Parametric View All

570ABA000121DGR Online Shopping

Suppliers	Part Number	Price	MOQ	In stock
	570ABA000121DGR	-	-	View	Buy Now

570ABA000121DGR Overview

ANY, I2C PROGRAMMABLE XO

570ABA000121DGR Parametric

Parameter Name	Attribute value
type	XO (Standard)
Function	Enable/Disable (Reprogrammable)
output	LVPECL
Voltage - Power	2.97 V ~ 3.63 V
frequency stability	±20ppm
Absolute pulling range (APR)	-
Operating temperature	-40°C ~ 85°C
Current - Power (maximum)	130mA
grade	-
Installation type	surface mount
Package/casing	8-SMD, no leads
size/dimensions	0.276" long x 0.197" wide (7.00mm x 5.00mm)

Preview

Download Datasheet

View All

Si 5 7 0 / S i 5 7 1

10 MH

Features



1.4 G H

C P

ROGRAMMABLE

XO/VCXO

Any programmable output



frequencies from 10 to 945 MHz and

select frequencies to 1.4 GHz



C serial interface



3rd generation DSPLL

with superior



jitter performance



3x better frequency stability than



SAW-based oscillators

Internal fixed crystal frequency

ensures high reliability and low

aging

Available LVPECL, CMOS,

LVDS, and CML outputs

Industry-standard 5x7 mm

package

Pb-free/RoHS-compliant



1.8, 2.5, or 3.3 V supply

Si5602

Applications



Ordering Information:



SONET/SDH

xDSL

10 GbE LAN/WAN

ATE

High performance

instrumentation



Low-jitter clock generation



Optical modules



Clock and data recovery

See page 31.

Pin Assignments:

See page 30.

(Top View)

SDA

Description

The Si570 XO/Si571 VCXO utilizes Silicon Laboratories’ advanced DSPLL

circuitry to provide a low-jitter clock at any frequency. The Si570/Si571 are user-

programmable to any output frequency from 10 to 945 MHz and select frequencies

to 1400 MHz with <1 ppb resolution. The device is programmed via an I

C serial

interface. Unlike traditional XO/VCXOs where a different crystal is required for

each output frequency, the Si57x uses one fixed-frequency crystal and a DSPLL

clock synthesis IC to provide any-frequency operation. This IC-based approach

allows the crystal resonator to provide exceptional frequency stability and

reliability. In addition, DSPLL clock synthesis provides superior supply noise

rejection, simplifying the task of generating low-jitter clocks in noisy environments

typically found in communication systems.

CLK–

GND

SCL

CLK+

Functional Block Diagram

CLK-

CLK+

Si570

SDA

Fixed

Frequency

10-1400 MHz



DSPLL Clock

Synthesis

SDA

SCL

CLK–

Si571 only

ADC

GND

SCL

CLK+

GND

Si571

Si570/Si571

Rev. 1.6 6/18

Recommended Resources

Fun lantern simulator circuit

Digital limiter circuit diagram

Dangerous speed warning device circuit diagram

CW6163 ordinary lathe electrical schematic circuit

Negative voltage to positive voltage conversion circuit diagram 2

Integrated voltage-stabilized power supply circuit that outputs positive and negative voltages simultaneously

EEWORLD University Hall----Live Replay: TI's new generation of integrated PA Zigbee 3.0 and multi-protocol solutions: Live replay: TI's new generation of Zigbee 3.0 and multi-protocol solutions with integrated PA : https://training.eeworld.com.cn/course/5626...; hi5 Integrated technical exchanges

The problem of ARM assembly MOVS instruction affecting CPSR and BX state switching instructions: Question 1: How does MOV affect CPSR? Question 2: To verify a conjecture that BX uses the last bit to mark the state switch. The program code is as follows: AREA EX,CODE,READONLY ENTRY MAIN ADR RO,THU...; bogedahan12 ARM Technology

FreeRTOS porting on F429: An embedded operating system is needed in the project. Considering free and open source, I first thought of freeRTOS. I just used it before and didn't care about the porting. Today I spent some time p...; zhoulei88 Real-time operating system RTOS

Design of Fully Digital Single-phase Three-level Rectifier Control Circuit: Abstract: Three-level rectifiers have attracted more and more attention due to their unique advantages. The working principle of three-level bridge rectifiers is introduced, and its control system is ...; zbz0529 Power technology

51 MCU timer initial value setting problem: I just came into contact with and learned 51. I saw that some timer initial value settings are TH0=(65536-50000)/256; TL0=(65536-50000)%256; some are TH0=0FCH TL0=66H. What is the difference between t...; zjjone1023 51mcu

44b0 How to write FIQ interrupt? Why do I still have an interrupt vector after 0x1c in my interrupt vector table?: 1. How to write 44b0 FIQ interrupt? 2. Why is there still an interrupt vector after 0x1c in my interrupt vector table? How does this work? b InitialReg b Error_ISR b Error_ISR b Error_ISR b Error_ISR ...; weizhou Embedded System

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

Popular Components