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74LVCH16374ADGG,11

Description
IC FF D-TYPE DUAL 8BIT 48TSSOP
Categorylogic    logic   
File Size238KB,15 Pages
ManufacturerNexperia
Websitehttps://www.nexperia.com
Download Datasheet Parametric Compare View All

74LVCH16374ADGG,11 Overview

IC FF D-TYPE DUAL 8BIT 48TSSOP

74LVCH16374ADGG,11 Parametric

Parameter NameAttribute value
Brand NameNexperia
MakerNexperia
Parts packaging codeTSSOP
package instructionTSSOP,
Contacts48
Manufacturer packaging codeSOT362-1
Reach Compliance Codecompliant
Samacsys Confidence2
Samacsys StatusReleased
Samacsys PartID1857749
Samacsys Pin Count48
Samacsys Part CategoryIntegrated Circuit
Samacsys Package CategorySmall Outline Packages
Samacsys Footprint NameSOT362-1 (TSSOP48)
Samacsys Released Date2019-11-12 07:41:52
Is SamacsysN
seriesLVC/LCX/Z
JESD-30 codeR-PDSO-G48
JESD-609 codee4
length12.5 mm
Logic integrated circuit typeBUS DRIVER
Humidity sensitivity level1
Number of digits8
Number of functions2
Number of ports2
Number of terminals48
Maximum operating temperature125 °C
Minimum operating temperature-40 °C
Output characteristics3-STATE
Output polarityTRUE
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
propagation delay (tpd)15.6 ns
Maximum seat height1.2 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)1.65 V
Nominal supply voltage (Vsup)1.8 V
surface mountYES
technologyCMOS
Temperature levelAUTOMOTIVE
Terminal surfaceNickel/Palladium/Gold (Ni/Pd/Au)
Terminal formGULL WING
Terminal pitch0.5 mm
Terminal locationDUAL
width6.1 mm
Base Number Matches1
74LVC16374A; 74LVCH16374A
Rev. 12 — 20 November 2018
16-bit edge-triggered D-type flip-flop; 5 V tolerant; 3-state
Product data sheet
1. General description
The 74LVC16374A and 74LVCH16374A are 16-bit edge-triggered flip-flops featuring separate
D-type inputs with bus hold (74LVCH16374A only) for each flip-flop and 3-state outputs for bus-
oriented applications. It consists of two sections of eight positive edge-triggered flip-flops. A clock
input (nCP) and an output enable (nOE) are provided for each octal.
The flip-flops store the state of their individual D-inputs that meet the set-up and hold time
requirements on the LOW-to-HIGH clock (CP) transition.
When pin nOE is LOW, the contents of the flip-flops are available at the outputs. When pin nOE is
HIGH, the outputs go to the high-impedance OFF-state. Operation of input nOE does not affect the
state of the flip-flops.
Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be applied to
the outputs. These features allow the use of these devices in mixed 3.3 V and 5 V applications.
Bus hold on data inputs eliminates the need for external pull-up resistors to hold unused inputs.
2. Features and benefits
5 V tolerant inputs/outputs for interfacing with 5 V logic
Wide supply voltage range from 1.2 V to 3.6 V
CMOS low power consumption
Multibyte flow-through standard pinout architecture
Low inductance multiple supply pins for minimum noise and ground bounce
Direct interface with TTL levels
All data inputs have bus hold (74LVCH16374A only)
High-impedance outputs when V
CC
= 0 V
Complies with JEDEC standard:
JESD8-7A (1.65 V to 1.95 V)
JESD8-5A (2.3 V to 2.7 V)
JESD8-C/JESD36 (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-B exceeds 200 V
CDM JESD22-C101E exceeds 1000 V
Specified from -40 °C to +85 °C and -40 °C to +125 °C

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Description IC FF D-TYPE DUAL 8BIT 48TSSOP 74LVC(H)16374A - 16-bit edge-triggered D-type flip-flop; 5 V tolerant; 3-state SSOP 48-Pin IC FF D-TYPE DUAL 8BIT 48TSSOP IC FF D-TYPE DUAL 8BIT 48TSSOP IC FF D-TYPE DUAL 8BIT 48TSSOP 74LVC(H)16374A - 16-bit edge-triggered D-type flip-flop; 5 V tolerant; 3-state TSSOP 48-Pin 74LVC(H)16374A - 16-bit edge-triggered D-type flip-flop; 5 V tolerant; 3-state TSSOP 48-Pin
Brand Name Nexperia Nexperia Nexperia Nexperia Nexperia Nexperia Nexperia
Parts packaging code TSSOP SSOP TSSOP TSSOP TSSOP TSSOP TSSOP
package instruction TSSOP, 7.50 MM, PLASTIC, MO-118, SOT370-1, SSOP-48 TSSOP, TSSOP, TSSOP, TSSOP, TSSOP48,.3,20 TSSOP, TSSOP48,.3,20
Contacts 48 48 48 48 48 48 48
Manufacturer packaging code SOT362-1 SOT370-1 SOT362-1 SOT362-1 SOT362-1 SOT362-1 SOT362-1
series LVC/LCX/Z LVC/LCX/Z LVC/LCX/Z LVC/LCX/Z LVC/LCX/Z LVC/LCX/Z LVC/LCX/Z
JESD-30 code R-PDSO-G48 R-PDSO-G48 R-PDSO-G48 R-PDSO-G48 R-PDSO-G48 R-PDSO-G48 R-PDSO-G48
length 12.5 mm 15.875 mm 12.5 mm 12.5 mm 12.5 mm 12.5 mm 12.5 mm
Logic integrated circuit type BUS DRIVER BUS DRIVER BUS DRIVER BUS DRIVER BUS DRIVER BUS DRIVER BUS DRIVER
Number of digits 8 8 8 8 8 8 8
Number of functions 2 2 2 2 2 2 2
Number of ports 2 2 2 2 2 2 2
Number of terminals 48 48 48 48 48 48 48
Maximum operating temperature 125 °C 125 °C 125 °C 125 °C 125 °C 85 °C 85 °C
Minimum operating temperature -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C
Output characteristics 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE
Output polarity TRUE TRUE TRUE TRUE TRUE TRUE TRUE
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code TSSOP SSOP TSSOP TSSOP TSSOP TSSOP TSSOP
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
propagation delay (tpd) 15.6 ns 7.5 ns 15.6 ns 15.6 ns 15.6 ns 6.4 ns 6.4 ns
Maximum seat height 1.2 mm 2.8 mm 1.2 mm 1.2 mm 1.2 mm 1.2 mm 1.2 mm
Maximum supply voltage (Vsup) 3.6 V 3.6 V 3.6 V 3.6 V 3.6 V 3.6 V 3.6 V
Minimum supply voltage (Vsup) 1.65 V 1.2 V 1.65 V 1.2 V 1.2 V 1.2 V 1.2 V
Nominal supply voltage (Vsup) 1.8 V 2.7 V 1.8 V 3.3 V 3.3 V 3.3 V 3.3 V
surface mount YES YES YES YES YES YES YES
technology CMOS CMOS CMOS CMOS CMOS CMOS CMOS
Temperature level AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE INDUSTRIAL INDUSTRIAL
Terminal form GULL WING GULL WING GULL WING GULL WING GULL WING GULL WING GULL WING
Terminal pitch 0.5 mm 0.635 mm 0.5 mm 0.5 mm 0.5 mm 0.5 mm 0.5 mm
Terminal location DUAL DUAL DUAL DUAL DUAL DUAL DUAL
width 6.1 mm 7.5 mm 6.1 mm 6.1 mm 6.1 mm 6.1 mm 6.1 mm
Maker Nexperia Nexperia Nexperia Nexperia Nexperia - -
Reach Compliance Code compliant compliant compliant compliant compliant - -
JESD-609 code e4 e4 - - - e4 e4
Humidity sensitivity level 1 1 - - - 1 1
Terminal surface Nickel/Palladium/Gold (Ni/Pd/Au) Nickel/Palladium/Gold (Ni/Pd/Au) - - - Nickel/Palladium/Gold (Ni/Pd/Au) Nickel/Palladium/Gold (Ni/Pd/Au)
Base Number Matches 1 1 1 1 - - -
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