534HAXXXXXXBGR datasheet, PDF - EEWORLD Datasheet

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534HAXXXXXXBGR: DescriptionCRYSTAL OSCILLATOR (XO) (10 MHZ TO 1.4 GHZ); File Size180KB，10 Pages; ManufacturerSILABS; Websitehttp://www.silabs.com

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534HAXXXXXXBGR Overview

CRYSTAL OSCILLATOR (XO) (10 MHZ TO 1.4 GHZ)

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Si534

P

R E L I M I N A R Y

D

A TA

S

H E E T

C

R Y S TA L

O

S C I L L A T O R

(XO)

(10 M H

Z T O

1.4 G H

Z

)

Features

Available with any-rate output

frequencies from 10 MHz to 945 MHz

and select frequencies to 1.4 GHz

Four selectable output frequencies

3rd generation DSPLL

®

with superior

jitter performance

3x better frequency stability than

SAW-based oscillators

Internal fixed crystal frequency

ensures high reliability and low

aging

Available CMOS, LVPECL,

LVDS, and CML outputs

3.3, 2.5, and 1.8 V supply options

Industry-standard 5 x 7 mm

package and pinout

Pb-free/RoHS-compliant

Si5602

Ordering Information:

See page 6.

Applications

SONET/SDH

Networking

SD/HD video

Clock and data recovery

FPGA/ASIC clock generation

Pin Assignments:

See page 5.

(Top View)

FS[1]

7

NC

OE

GND

1

2

3

8

FS[0]

6

5

4

V

DD

Description

The Si534 quad frequency XO utilizes Silicon Laboratories’ advanced

DSPLL

®

circuitry to provide a low jitter clock at high frequencies. The Si534

is available with any-rate output frequency from 10 to 945 MHz and select

frequencies to 1400 MHz. Unlike a traditional XO where a different crystal is

required for each output frequency, the Si534 uses one fixed crystal to

provide a wide range of output frequencies. This IC based approach allows

the crystal resonator to provide exceptional frequency stability and reliability.

In addition, DSPLL clock synthesis provides superior supply noise rejection,

simplifying the task of generating low jitter clocks in noisy environments

typically found in communication systems. The Si534 IC-based XO is factory

configurable for a wide variety of user specifications including frequency,

supply voltage, output format, and temperature stability. Specific

configurations are factory programmed at time of shipment, thereby

eliminating long lead times associated with custom oscillators.

CLK–

CLK+

(LVDS/LVPECL/CML)

FS[1]

7

NC

OE

GND

1

2

3

8

FS[0]

6

5

4

V

DD

Functional Block Diagram

V

DD

CLK– CLK+

NC

CLK

FS[1]

Fixed

Frequency

XO

Any-rate

10–1400 MHz

DSPLL

®

Clock

Synthesis

FS[0]

(CMOS)

OE

GND

Preliminary Rev. 0.4 5/06

Copyright © 2006 by Silicon Laboratories

Si534

This information applies to a product under development. Its characteristics and specifications are subject to change without notice.

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