3.3V 32M x 64/72-Bit SDRAM Modules
3.3V 64M x 64/72-Bit SDRAM Modules
PC100-168 pin unbuffered DIMM Modules
HYS64/72V32200GU
HYS64/72V64220GU
•
•
•
•
•
•
•
168 Pin unbuffered 8 Byte Dual-In-Line SDRAM Modules for PC main memory applications
One bank 32M x 64 and 32M x 72 organisation
Two bank 64M x 64 and 64M x 72 organisation
Optimized for byte-write non-parity or ECC applications
Fully PC board layout compatible to INTEL’s Rev. 1.0 module specification
JEDEC standard Synchronous DRAMs (SDRAM)
SDRAM Performance:
-8
f
CK
t
AC
Clock frequency (max.)
Clock access time
100
6
-8A
100
6
-8B
100
6
Units
MHz
ns
•
Programmed Latencies :
Product Speed
-8
-8A
-8B
PC100
PC100
PC100
CL
2
3
3
tRCD
2
2
2
tRP
2
2
3
•
•
Single +3.3V(± 0.3V ) power supply
Programmable CAS Latency, Burst Length and Wrap Sequence
(Sequential & Interleave)
Auto Refresh (CBR) and Self Refresh
Decoupling capacitors mounted on substrate
All inputs, outputs are LVTTL compatible
Serial Presence Detect with E
2
PROM
Uses SIEMENS 256Mbit SDRAM components in 32M x 8 organisation and TSOPII-54 packages
Gold contact pad
Card Size: 133,35 mm x 31.75 mm x 4,00 mm
•
•
•
•
•
•
•
INFINEON Technologies
1
4.99
HYS64(72)V32200/64220GU
SDRAM-Modules
The HYS64/72V32200 and HYS64/72V64220 are industry standard 168-pin 8-byte Dual in-line Memory Modules
(DIMMs) which are organised as 32M x 64 and 32M x 72 in 1 bank and 64M x 64 and 64M x 72 in two banks
high speed memory arrays designed with 256M Synchronous DRAMs (SDRAMs) for non-parity and ECC
applications. The DIMMs use -8 and -8B speed sort for 32M x 8 SDRAM devices in TSOP54 packages to meet the
PC100 requirement. Decoupling capacitors are mounted on the PC board. The PC board design is according to
INTEL’s PC 100 module specification.
The DIMMs have a serial presence detect, implemented with a serial E
2
PROM using the two pin I
2
C protocol. The
first 128 bytes are utilized by the DIMM manufacturer and the second 128 bytes are available to the end user.
All SIEMENS 168-pin DIMMs provide a high performance, flexible 8-byte interface in a 133,35 mm long footprint,
with 1,25“ ( 31,75 mm) height.
Ordering Information
Type
HYS 64V32200GU-8
HYS 72V32200GU-8
HYS 64V64220GU-8
HYS 72V64220GU-8
HYS 64V32200GU-8A
HYS 72V32200GU-8A
HYS 64V64220GU-8A
HYS 72V64220GU-8A
HYS 64V32200GU-8B
HYS 72V32200GU-8B
HYS 64V64220GU-8B
HYS 72V64220GU-8B
Code
PC100-222-620
PC100-222-620
PC100-222-620
PC100-222-620
PC100-222-620
PC100-222-620
PC100-222-620
PC100-222-620
PC100-323-620
PC100-323-620
PC100-323-620
PC100-323-620
Package
Descriptions
Module
Height
1,25“
1,25“
1,25“
1,25“
1,25“
1,25“
1,25“
1,25“
1,25“
1,25“
1,25“
1,25“
L-DIM-168-30
PC100 32M x 64 1 bank SDRAM module
L-DIM-168-30
PC100 32M x 72 1 bank SDRAM module
L-DIM-168-30
PC100 64M x 64 2 bank SDRAM module
L-DIM-168-30
PC100 64M x 72 2 bank SDRAM module
L-DIM-168-30
PC100 32M x 64 1 bank SDRAM module
L-DIM-168-30
PC100 32M x 72 1 bank SDRAM module
L-DIM-168-30
PC100 64M x 64 2 bank SDRAM module
L-DIM-168-30
PC100 64M x 72 2 bank SDRAM module
L-DIM-168-30
PC100 32M x 64 1 bank SDRAM module
L-DIM-168-30
PC100 32M x 72 1 bank SDRAM module
L-DIM-168-30
PC100 64M x 64 2 bank SDRAM module
L-DIM-168-30
PC100 64M x 72 2 bank SDRAM module
Pin Names
A0-A12
BA0, BA1
DQ0 - DQ63
CB0-CB7
RAS
CAS
WE
CKE0, CKE1
Address Inputs
Bank Selects
Data Input/Output
Check Bits (x72 organisation
only)
Row Address Strobe
Column Address Strobe
Read / Write Input
Clock Enable
CLK0 - CLK3
DQMB0 - DQMB7
CS0 - CS3
Vcc
Vss
SCL
SDA
N.C. / DU
Clock Input
Data Mask
Chip Select
Power (+3.3 Volt)
Ground
Clock for Presence Detect
Serial Data Out for Presence
Detect
No Connection
Address Format:
32M x 64/72
64M x 64/72
Part Number
HYS64/72V32200GU
HYS64/72V64220GU
Rows
13
13
Columns
10
10
Banks
2
2
Refresh
8k
8k
Period
64 ms
64 ms
Interval
7,8
µs
7,8
µs
INFINEON Technologies
2
HYS64(72)V32200/64220GU
SDRAM-Modules
CS1
CS0
CS
DQMB0
DQ(7:0)
DQM
DQ0-DQ7
D0
CS
DQMB1
DQ(15:8)
DQM
DQ0-DQ7
D1
CS
DQM
CB(7:0)
CS3
CS2
CS
DQMB2
DQ(23:16)
DQM
DQ0-DQ7
D2
CS
DQMB3
DQ(31:24)
DQM
DQ0-DQ7
D3
DQM
DQ0-DQ7
D11
DQM
DQ0-DQ7
D10
CS
DQMB7
DQ(63:56)
DQM
DQ0-DQ7
D7
CS
DQMB6
DQ(55:48)
DQM
DQ0-DQ7
D6
CS
DQM
DQ0-DQ7
D15
CS
DQM
DQ0-DQ7
D14
CS
CS
DQ0-DQ7
D16
DQM
DQ0-DQ7
D9
CS
DQM
DQ0-DQ7
D17
DQM
DQ0-DQ7
D8
CS
DQMB5
DQ(47:40)
DQM
DQ0-DQ7
D5
CS
DQMB4
DQ(39:32)
DQM
DQ0-DQ7
D4
CS
DQM
DQ0-DQ7
D13
CS
DQM
DQ0-DQ7
D12
CS
CS
A0-A12,BA0,BA1
VDD
VSS
D0 - D15,(D16,D17)
D0 - D15,(D16,D17)
E
2
PROM (256wordx8bit)
SA0
SA1
SA2
SCL
SA0
SA1
SA2
SCL
SDA
WP
47k
C0-C31,(C32..C35)
D0 - D7,(D8)
D0 - D15,(D16,D17)
D0 - D7,(D16)
VDD
RAS, CAS, WE
CKE0
10k
CKE1
D9 - D15,(D17)
CLK0
CLK1
CLK2
CLK3
Clock Wiring
64M x 64
64M x 72
4 SDRAM+3.3pF 5 SDRAM
4 SDRAM+3.3pF 5 SDRAM
4 SDRAM+3.3pF 4 SDRAM+3.3pF
4 SDRAM+3.3pF 4 SDRAM+3.3pF
Note: D16 & D17 is only used in the x72 ECC version and all resistor values are 10 Ohms except otherwise noted.
Block Diagram for 64M x 64/72 two bank SDRAM DIMM modules
INFINEON Technologies
5