DS1305
Serial Alarm Real-Time Clock
BENEFITS AND FEATURES
•
Completely Manages All Timekeeping
Functions
o
Real-Time Clock (RTC) Counts Seconds,
Minutes, Hours, Date of the Month,
Month, Day of the Week, and Year with
Leap-Year Compensation Valid Up to
2100
o
96-Byte, Battery-Backed NV RAM for
Data Storage
o
Two Time-Of-Day Alarms,
Programmable on Combination of
Seconds, Minutes, Hours, and Day of the
Week
Standard Serial Port Interfaces with Most
Microcontrollers
o
Supports SPI (Serial Peripheral Interface)
Modes 1 and 3 or Standard 3-Wire
Interface
o
Burst Mode for Reading/Writing
Successive Addresses in Clock/RAM
Multiple Power Supply Pins Ease Adding
Battery For Backup
o
Dual-Power Supply Pins for Primary and
Backup Power Supplies
o
Optional Trickle Charge Output to
Backup Supply
o
2.0V to 5.5V Operation
20-Pin TSSOP Minimizes Required Space
Optional Industrial Temperature Range:
-40°C to +85°C Supports Operation in a
Wide Range of Applications
Underwriters Laboratory (UL®) Recognized
PIN CONFIGURATIONS
TOP VIEW
V
CC2
V
BAT
X1
N.C.
X2
N.C.
INT0
N.C.
INT1
GND
1
2
3
4
5
6
7
8
9
10
20
V
CC1
N.C.
PF
V
CCIF
SD0
SDI
SCLK
N.C.
CE
SERMODE
DS1305
19
18
17
16
15
14
13
12
11
TSSOP (4.4mm)
V
CC2
V
BAT
X1
X2
N.C.
INT0
INT1
GND
1
2
3
4
5
6
7
8
16
15
V
CC1
PF
V
CCIF
SDO
SDI
SCLK
CE
SERMODE
•
DS1305
14
13
12
11
10
9
•
DIP (300 mils)
TYPICAL OPERATING CIRCUIT
•
•
•
UL is a registered trademark of Underwriters Laboratories Inc.
19-5055; Rev 4/15
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DS1305
ORDERING INFORMATION
PART
DS1305
DS1305N
DS1305E
DS1305E+
DS1305E/T&R
DS1305E+T&R
DS1305EN
DS1305EN+
DS1305EN/T&R
DS1305EN+T&R
TEMP RANGE
0°C to +70°C
-40°C to +85°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
PIN-PACKAGE
16 DIP (300 mils)
16 DIP (300 mils)
20 TSSOP (173 mils)
20 TSSOP (173 mils)
20 TSSOP (173 mils)
20 TSSOP (173 mils)
20 TSSOP (173 mils)
20 TSSOP (173 mils)
20 TSSOP (173 mils)
20 TSSOP (173 mils)
TOP MARK*
DS1305
DS1305N
DS1305
DS1305
DS1305
DS1305
DS1305
DS1305N
DS1305
DS1305
+Denotes
a lead(Pb)-free/RoHS-compliant package.
T&R = Tape and reel.
*An
“N” on the top mark denotes an industrial device.
DESCRIPTION
The DS1305 serial alarm real-time clock provides a full binary coded decimal (BCD) clock calendar that
is accessed by a simple serial interface. The clock/calendar provides seconds, minutes, hours, day, date,
month, and year information. The end of the month date is automatically adjusted for months with fewer
than 31 days, including corrections for leap year. The clock operates in either the 24-hour or 12-hour
format with AM/PM indicator. In addition, 96 bytes of NV RAM are provided for data storage. The
DS1305 will maintain the time and date, provided the oscillator is enabled, as long as at least one supply
is at a valid level.
An interface logic power-supply input pin (V
CCIF
) allows the DS1305 to drive SDO and
PF
pins to a level
that is compatible with the interface logic. This allows an easy interface to 3V logic in mixed supply
systems.
The DS1305 offers dual-power supplies as well as a battery input pin. The dual power supplies support a
programmable trickle charge circuit that allows a rechargeable energy source (such as a super cap or
rechargeable battery) to be used for a backup supply. The V
BAT
pin allows the device to be backed up by
a non-rechargeable battery. The DS1305 is fully operational from 2.0V to 5.5V.
Two programmable time-of-day alarms are provided by the DS1305. Each alarm can generate an
interrupt on a programmable combination of seconds, minutes, hours, and day. “Don’t care” states can be
inserted into one or more fields if it is desired for them to be ignored for the alarm condition. The time-of-
day alarms can be programmed to assert two different interrupt outputs or to assert one common interrupt
output. Both interrupt outputs operate when the device is powered by V
CC1
, V
CC2
, or V
BAT
.
The DS1305 supports a direct interface to SPI serial data ports or standard 3-wire interface. A
straightforward address and data format is implemented in which data transfers can occur 1 byte at a time
or in multiple-byte-burst mode.
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DS1305
PIN DESCRIPTION
PIN
DIP
TSSOP
1
1
NAME
V
CC2
FUNCTION
2
2
V
BAT
3
3
X1
4
5
5
4, 6, 8,
13, 19
X2
N.C.
Backup Power Supply. This is the secondary power supply pin. In systems
using the trickle charger, the rechargeable energy source is connected to this
pin.
Battery Input for Standard +3V Lithium Cell or Other Energy Source. If not
used, V
BAT
must be connect to ground. Diodes must not be placed in series
between V
BAT
and the battery, or improper operation will result. UL
recognized to ensure against reverse charging current when used in
conjunction with a lithium battery. See “Conditions of Acceptability” at
www.maxim-ic.com/TechSupport/QA/ntrl.htm.
Connections for Standard 32.768kHz Quartz Crystal. The internal oscillator is
designed for operation with a crystal having a specified load capacitance of
6pF. For more information on crystal selection and crystal layout
considerations, refer to
Application Note 58: Crystal Considerations with
Dallas Real-Time Clocks.
The DS1305 can also be driven by an external
32.768kHz oscillator. In this configuration, the X1 pin is connected to the
external oscillator signal and the X2 pin is floated.
No Connection
Active-Low Interrupt 0 Output. The
INT0
pin is an active-low output of the
DS1305 that can be used as an interrupt input to a processor. The
INT0
pin
can be programmed to be asserted by only Alarm 0 or can be programmed to
be asserted by either Alarm 0 or Alarm 1. The
INT0
pin remains low as long
as the status bit causing the interrupt is present and the corresponding interrupt
enable bit is set. The
INT0
pin operates when the DS1305 is powered by
V
CC1
, V
CC2
, or V
BAT
. The
INT0
pin is an open-drain output and requires an
external pullup resistor.
Active-Low Interrupt 1 Output. The
INT1
pin is an active-low output of the
DS1305 that can be used as an interrupt input to a processor. The
INT1
pin
can be programmed to be asserted by Alarm 1 only. The
INT1
pin remains
low as long as the status bit causing the interrupt is present and the
corresponding interrupt enable bit is set. The
INT1
pin operates when the
DS1305 is powered by V
CC1
, V
CC2
, or V
BAT
. The
INT1
pin is an open-drain
output and requires an external pullup resistor. Both
INT0
and
INT1
are
open-drain outputs. The two interrupts and the internal clock continue to run
regardless of the level of V
CC
(as long as a power source is present).
Ground
Serial Interface Mode. The SERMODE pin offers the flexibility to choose
between two serial interface modes. When connected to GND, standard 3-wire
communication is selected. When connected to V
CC
, SPI communication is
selected.
Chip Enable. The chip-enable signal must be asserted high during a read or a
write for both 3-wire and SPI communication. This pin has an internal 55kΩ
pulldown resistor (typical).
Serial Clock Input. SCLK is used to synchronize data movement on the serial
interface for either the SPI or 3-wire interface.
6
7
INT0
7
9
INT1
8
9
10
11
GND
SERMODE
10
11
12
14
CE
SCLK
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DS1305
PIN DESCRIPTION (continued)
PIN
DIP
TSSOP
12
15
NAME
FUNCTION
SDI
13
16
SDO
14
17
V
CCIF
15
16
18
20
PF
V
CC1
Serial Data Input. When SPI communication is selected, the SDI pin is the
serial data input for the SPI bus. When 3-wire communication is selected, this
pin must be tied to the SDO pin (the SDI and SDO pins function as a single I/O
pin when tied together).
Serial Data Output. When SPI communication is selected, the SDO pin is the
serial data output for the SPI bus. When 3-wire communication is selected, this
pin must be tied to the SDI pin (the SDI and SDO pins function as a single I/O
pin when tied together).
Interface Logic Power-Supply Input. The V
CCIF
pin allows the DS1305 to drive
SDO and
PF
output pins to a level that is compatible with the interface logic,
thus allowing an easy interface to 3V logic in mixed supply systems. This pin is
physically connected to the source connection of the p-channel transistors in
the output buffers of the SDO and
PF
pins.
Active-Low Power-Fail Output. The
PF
pin is used to indicate loss of the
primary power supply (V
CC1
). When V
CC1
is less than V
CC2
or is less than V
BAT
,
the
PF
pin is driven low.
Primary Power Supply. DC power is provided to the device on this pin.
OPERATION
The block diagram in Figure 1 shows the main elements of the serial alarm RTC. The following
paragraphs describe the function of each pin.
Figure 1. BLOCK DIAGRAM
OSCILLATOR AND
COUNTDOWN CHAIN
1Hz
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DS1305
RECOMMENDED LAYOUT FOR CRYSTAL
Local ground plane (Layer 2)
X1
crystal
X2
GND
CLOCK ACCURACY
The accuracy of the clock is dependent upon the accuracy of the crystal and the accuracy of the match
between the capacitive load of the oscillator circuit and the capacitive load for which the crystal was
trimmed. Additional error is added by crystal frequency drift caused by temperature shifts. External
circuit noise coupled into the oscillator circuit can result in the clock running fast. Refer to
Application
Note 58,
“Crystal Considerations with Dallas Real-Time Clocks” for detailed information.
Table 1. Crystal Specifications
PARAMETER
Nominal Frequency
Series Resistance
Load Capacitance
SYMBOL
f
O
ESR
C
L
MIN
TYP
32.768
6
MAX
45
UNITS
kHz
kΩ
pF
Note:
The crystal, traces, and crystal input pins should be isolated from RF generating signals. Refer to
Applications Note 58: Crystal Considerations for Dallas Real-Time Clocks
for additional specifications.
CLOCK, CALENDAR, AND ALARM
The time and calendar information is obtained by reading the appropriate register bytes. The RTC
registers and user RAM are illustrated in Figure 2. The time, calendar, and alarm are set or initialized by
writing the appropriate register bytes. Note that some bits are set to 0. These bits always read 0 regardless
of how they are written. Also note that registers 12h to 1Fh (read) and registers 92h to 9Fh are reserved.
These registers always read 0 regardless of how they are written. The contents of the time, calendar, and
alarm registers are in the BCD format. The day register increments at midnight. Values that correspond to
the day of week are user-defined but must be sequential (e.g., if 1 equals Sunday, 2 equals Monday and so
on). Illogical time and date entries result in undefined operation.
Except where otherwise noted, the initial power on state of all registers is not defined. Therefore, it is
important to enable the oscillator (EOSC = 0) and disable write protect (WP = 0) during initial
configuration.
WRITING TO THE CLOCK REGISTERS
The internal time and date registers continue to increment during write operations. However, the
countdown chain is reset when the seconds register is written. Writing the time and date registers within
one second after writing the seconds register ensures consistent data.
Terminating a write before the last bit is sent aborts the write for that byte.
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