3DSD1280-PROTO datasheet, PDF - EEWORLD Datasheet

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3DSD1280-PROTO: Description1.28 GBit Synchronous DRAM - Hermetic package; File Size38KB，2 Pages; ManufacturerETC

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3DSD1280-PROTO Overview

1.28 GBit Synchronous DRAM - Hermetic package

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PRELIMINARY

1.28 Gbit SDRAM

ELECTRONICS

3DSD1280-323H

1.28 GBit Synchronous DRAM - Hermetic package

Features

Organized as 40M x 32-bit.

Single +3.3V ±0.3V power supply

Two stacks of ten 64 MBit SDRAM mounted

on ceramic hermetic package

Fully synchronous; all signals registered on

positive edge of system clock.

Internal pipelined operation; column address

can be changed every clock cycle.

Programmable burst lengths: 1, 2, 4, 8 or full

page.

Auto Precharge, includes Concurrent Auto

Precharge, and Auto Refresh Modes.

Self Refresh Mode

LVTTL - compatible inputs and outputs

Vcc and Vss are decoupled with four 10nF

and four 100nF capacitors inside the module

MIL-STD-883D Class S screening -

temperature range : -15°C to +80°

Pin configuration for

3DSD1024-0863S

GND

NC/A12*

DQM

BS1

BS0

A11

A10

GND

Vcc

A0-A12*

General Description

The 3DSD1280-323H is a highly integrated Synchro-

nous Dynamic Random Access Memory ceramic mo-

dule, containing 1,342,177,280 bits. It is organized

with ten banks of 128 Mbit. Each Bank has a 32-bit in-

terface, and is selected with specific CS#. All other si-

gnals are common to the twenty 64 MBit SDRAM

memories.

It is particularly well suited for use in high performance

and high density aerospace applications, such as solid

state recorder for airbornes and satellites.

The 3DSD1280-323H is packaged in a 84-pin CQFJ.

Pin Description

DQ0-DQ31

Data Inputs/Outputs

Address

Column Address Select

Row Address Select

Write Enable

Chip Select

Bank Address Input

Clock

Clock Enable

Input/Output Mask

Power (+3.3v)

Ground

No Connection

CAS#

RAS#

WE#

CS0# - CS9#

BS0,BS1

CLK

CKE

DQM

Vcc

GND

Vcc

DQ16

DQ17

DQ18

DQ19

DQ20

DQ21

DQ22

DQ23

Vcc

GND

DQ24

DQ25

DQ26

DQ27

DQ28

DQ29

DQ30

DQ31

GND

TOP VIEW

GND

DQ0

DQ1

DQ2

DQ3

DQ4

DQ5

DQ6

DQ7

GND

Vcc

DQ8

DQ9

DQ10

DQ11

DQ12

DQ13

DQ14

DQ15

Vcc

Block Diagram

VCC

CLK

RAS

CAS

DQ[0...15]

A[0...12]

Vcc

CLK

WE#

CAS#

CS6#

CS5#

CS4#

CS3#

CS2#

CS1#

CS0#

CKE

GND

RAS#

CS9#

CS8#

CS7#

Vcc

GND

* : A12 is a provision for 256Mb components extension

CLK

RAS

CAS

CS[0...9]

CKE

UDQM

LDQM

VCC DQ[0...15]

A[0...11]

BSO

BS1

A12/NC

GND

VCC

CLK

DQ[0...15]

RAS

CAS

A[0...11]

BSO

CS[0...9]

BS1

CKE

A12/NC

UDQM

LDQM

GND

BSO

BS1

CS[0...9]

CKE

DQM

GND

3D PLUS,

641 rue Hélène Boucher - ZI

F-78532 BUC Cedex FRANCE

Tel : 33 (0)1 30 83 26 50 FAX : 33 (0)1 39 56 25 89

Web : http://www. 3d-plus.com

3DFP-0008

Rev : 2

December 1999

Page 1/2

3DSD1280-PROTO Related Products

	3DSD1280-PROTO	3DSD1280-323H	3DSD1280-883D-S
Description	1.28 GBit Synchronous DRAM - Hermetic package	1.28 GBit Synchronous DRAM - Hermetic package	1.28 GBit Synchronous DRAM - Hermetic package

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