3974_1 datasheet, PDF - EEWORLD Datasheet

3974

DMOS DUAL FULL-BRIDGE PWM MOTOR DRIVER

LOAD

43

SUPPLY

1

SENSE

1

ENABLE

1

OUT

1A

GND

NC

OUT

1B

NC

V

BB1

NC

STROBE

CLOCK

7

39

NC

CP2

CP1

CP

GND

OSC

SLEEP

V

REG

NC

SERIAL PORT

8

9

38

37

36

35

34

33

PROGRAM

PWM TIMER

LOGIC

DATA

10

GND

11

GND

12

GND

13

REF

1

14

REF

2

15

LOGIC

16

SUPPLY

NC

17

V

DD

÷

PROGRAM

PWM TIMER

LOGIC

32

31

30

29

V

BB2

Dwg. PP-073

Designed for pulse-width modulated (PWM) current control

of two dc motors, the A3974SED is capable of output currents to

±1.5

A and operating voltages to 50 V. Internal fixed off-time

PWM current-control timing circuitry can be programmed via a

serial interface to operate in slow, fast, and mixed current-decay

modes.

Independant ENABLE input terminals are provided for use in

controlling the speed and torque of each dc motor with externally

applied PWM control signals.

Synchronous rectification circuitry allows the load current to

flow through the low

r

DS(on)

of the DMOS output driver during

the current decay. This feature will eliminate the need for

external clamp diodes in most applications, saving cost and

external component count, while minimizing power dissipation.

Internal circuit protection includes thermal shutdown with

hysteresis, undervoltage monitoring of V

DD

and the charge

pump, and crossover-current protection. Special power-up

sequencing is not required.

The A3974SED is supplied in a 44-lead plastic PLCC with

four copper batwing tabs for maximum heat dissipation. The

power tabs are at ground potential and need no electrical isola-

tion.

Data Sheet

29319.35b

41

NC

27

44

42

OUT

2A

18

NC

20

21

GND

22

23

GND

24

25

ENABLE

2

26

NC

19

SENSE

2

ABSOLUTE MAXIMUM RATINGS

at T

A

= +25

°

C

Load Supply Voltage, V

BB

............................

50 V

Output Current, I

OUT

..................................

±

1.5 A

Logic Supply Voltage, V

DD

..........................

7.0 V

Logic Input Voltage Range, V

IN

Continous ...................

-0.3 V to V

DD

+ 0.3 V

t

W

< 30 ns ...................

-1.0 V to V

DD

+ 1.0 V

Reference Voltage, V

REF

.................................

3 V

Sense Voltage (dc), V

S

Continous ..............................................

0.5 V

t

W

< 1

µs

................................................

2.5 V

Package Power Dissipation, P

D

..................

3.9 W

Operating Temperature Range,

T

A

.........................................

-20

°

C to +85

°

C

Junction Temperature, T

J

.........................

+150

°

C

Storage Temperature Range,

T

S

.......................................

-55

°

C to +150

°

C

Output current rating may be limited by duty cycle,

ambient temperature, and heat sinking. Under any set

of conditions, do not exceed the specified current rating

or a junction temperature of 150°C.

LOAD

SUPPLY

2

OUT

2B

28

GND

CHARGE PUMP

40

2

4

6

5

3

1

FEATURES

■

±1.5

A, 50 V Continuous Output Rating

■

Low

r

DS(on)

DMOS Output Drivers

■

Programmable Slow, Fast, and Mixed Current-Decay Modes

■

Serial-Interface Controls Chip Functions

■

Synchronous Rectification for Low Power Dissipation

■

Internal UVLO and Thermal Shutdown Circuitry

■

Crossover-Current Protection

■

Sleep and Idle Modes

Selection Guide

Part Number

A3974SED-T

Yes

44-pin PLCC

27 per tube

A3974SEDTR-T

Yes

44-pin PLCC

450 per reel

*Pb-based variants are being phased out of the product line. The variants cited in

this footnote are in production but have been determined to be LAST TIME BUY.

This classification indicates that sale of this device is currently restricted

to existing customer applications. The variants should not be purchased for new

design applications because obsolescence in the near future is probable. Samples

are no longer available. Status change: October 31, 2006. Deadline for LAST TIME

BUY orders: April 27, 2007. These variants include: A3974SED and A3974SEDTR.

.

Pb-free*

Package

Packing

3974

DMOS DUAL FULL-BRIDGE

PWM MOTOR DRIVER

FUNCTIONAL BLOCK DIAGRAM

V

DD

LOGIC

SUPPLY

CHARGE PUMP

BANDGAP

V

DD

C

REG

TSD

V

BB1

+

CP1

CP2

LOAD

SUPPLY

1

BANDGAP

REGULATOR

V

REG

UNDER-

VOLTAGE &

FAULT DETECT

CHARGE

PUMP

CONTROL LOGIC

CP

PHASE

SYNC RECT MODE

SYNC RECT DISABLE

MODE

OUT

1A

ENABLE

1

GATE DRIVE

OUT

1B

SENSE

1

C

S1

FIXED OFF

PROGRAMMABLE

BLANK

DECAY

ZERO CURRENT DETECT

R

S1

PWM TIMER

OSC

CLOCK

DATA

STROBE

CURRENT SENSE

SERIAL

PORT

REFERENCE

BUFFER &

DIVIDER

REF

1

LOAD

SUPPLY

2

V

REF

V

BB2

PROGRAMMABLE

PWM TIMER

FIXED OFF

BLANK

DECAY

CHARGE

PUMP

+

ENABLE

2

GATE DRIVE

SLEEP

MODE

PHASE

ENABLE

SYNC RECT MODE

SYNC RECT DISABLE

PWM MODE INT

PWM MODE EXT

OUT

2A

OUT

2B

SENSE

2

CONTROL LOGIC

TO PWM TIMER

C

S2

ZERO CURRENT DETECT

R

S2

CURRENT SENSE

REFERENCE

BUFFER &

DIVIDER

REF

2

V

REF2

Dwg. FP-048-1

2

115 Northeast Cutoff, Box 15036

Worcester, Massachusetts 01615-0036 (508) 853-5000

3974

DMOS DUAL FULL-BRIDGE

PWM MOTOR DRIVER

ELECTRICAL CHARACTERISTICS at T

A

= +25

°

C, V

BB

= 50 V, V

DD

= 5.0 V, f

PWM

< 50 kHz (unless

otherwise noted).

Characteristic

Output Drivers

Load Supply Voltage Range

V

BB

Operating

During sleep mode

Output Leakage Current

I

DSS

V

OUT

= V

BB

V

OUT

= 0 V

Output ON Resistance

r

DS(on)

Source driver, I

OUT

= -1.5 A

Sink driver, I

OUT

= 1.5 A

Body Diode Forward Voltage

V

F

Source diode, I

F

= 1.5 A

Sink diode, I

F

= 1.5 A

Load Supply Current

I

BB

f

PWM

< 50 kHz

Charge pump on, outputs disabled

Sleep or idle mode

Control Logic

Logic Supply Voltage Range

Logic Input Voltage

V

DD

V

IN(1)

V

IN(0)

Logic Input Current

(except ENABLE)

ENABLE Input Current

I

IN(1)

I

IN(0)

I

EN(1)

I

EN(0)

OSC Input Frequency

OSC Input Duty Cycle

OSC Input Hysterisis

Reference Input Voltage Range

f

OSC

—

∆V

IN

V

REF

Operating

V

IN

= 2.0 V

V

IN

= 0.8 V

V

EN

= 2.0 V

V

EN

= 0.8 V

Operating

4.5

2.0

—

2.9

40

200

0

5.0

—

<1.0

40

16

—

5.5

—

0.8

±20

100

30

6.1

60

400

2.6

V

µA

MHz

%

mV

V

15

0

—

<1.0

<-1.0

0.5

0.315

—

4.0

2.0

—

50

20

-20

0.55

0.35

1.2

7.0

5.0

20

V

µA

Ω

V

mA

µA

Symbol

Test Conditions

Min.

Limits

Typ. Max.

Units

continued next page ...

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3

3974

DMOS DUAL FULL-BRIDGE

PWM MOTOR DRIVER

ELECTRICAL CHARACTERISTICS at T

A

= +25

°

C, V

BB

= 50 V, V

DD

= 5.0 V, f

PWM

< 50 kHz (unless

otherwise noted), continued.

Limits

Typ. Max.

—

±10

10

5.0

0

750

150

750

150

600

165

15

4.2

0.10

—

±1.0

—

±4.0

±14

±4.0

±10

1000

350

1000

350

1000

—

4.45

—

10

8.0

1.5

100

Characteristic

Control Logic (continued)

Reference Input Current

Reference Input Offset Voltage

Reference Divider Ratio

Symbol

I

REF

V

IO

V

REF

/V

S

Test Conditions

V

REF

= 2.6 V

Min.

—

Units

µA

mV

—

%

ns

°C

V

mA

µA

D16 = 1

D16 = 0

—

600

50

600

50

300

—

Gain (G

m

) Error (note 3)

E

G

V

REF

= 2.6 V, D16 = 0

V

REF

= 0.5 V, D16 = 0

V

REF

= 2.6 V, D16 = 1

V

REF

= 0.5 V, D16 = 1

Propagation Delay Time

t

pd

50% TO 90%:

PWM change to source on

PWM change to source off

PWM change to sink on

PWM change to sink off

SR enabled

Crossover Delay Time

Thermal Shutdown Temperature

Thermal Shutdown Hysteresis

UVLO Enable Threshold

UVLO Hysteresis

Logic Supply Current

t

COD

T

J

∆T

J

V

UVLO

∆V

UVLO

I

DD

Increasing V

DD

3.9

0.05

f

PWM

< 50 kHz

Outputs off

Idle mode (D18 = 1, D19 = 0)

Sleep mode (inputs below 0.5 V)

—

NOTES: 1. Typical Data is for design information only.

2. Negative current is defined as coming out of (sourcing) the specified device terminal.

3. E

G

= [(V

REF

/Range) - V

S

]/(V

REF

/Range).

4

115 Northeast Cutoff, Box 15036

Worcester, Massachusetts 01615-0036 (508) 853-5000

3974

DMOS DUAL FULL-BRIDGE

PWM MOTOR DRIVER

FUNCTIONAL DESCRIPTION

Serial Interface.

The A3974SED is controlled via a 3-wire

(clock, data,strobe) serial port. The programmable functions

allow maximum flexibility in configuring the PWM to the

motor drive requirements. The serial data is written as two 20-

bit words: 1 bit to select the word and 19 bits of data. The data

is clocked in starting with D19.

Word 0 Bit Assignments

Select Word 0 (D18 = 0)

Bit

Function

D0

Bridge 1 blank time LSB

D1

Bridge 1 blank time MSB

D2

Bridge 1 off-time LSB

D3

Bridge 1 off-time bit 1

D4

Bridge 1 off-time bit 2

D5

Bridge 1 off-time bit 3

D6

Bridge 1 off-time MSB

D7

Bridge 1 fast-decay time bit LSB

D8

Bridge 1 fast-decay time bit 1

D9

Bridge 1 fast-decay time bit 2

D10

Bridge 1 fast-decay time MSB

D11

Bridge 1 sync. rect. control

D12

Bridge 1 sync. rect. control

D13

Bridge 1 external PWM mode

D14

Bridge 1 enable

D15

Bridge 1 phase

D16

Bridge 1 reference range select

D17

Bridge 1 internal PWM mode

D18

Word select = 0

D19

Test mode

D0 – D1 Blank Time.

The current-sense comparator is

blanked when any output driver is switched on, according to the

table below. f

osc

is the oscillator input frequency.

D1

0

1

D0

0

1

0

1

Blank Time

4/f

OSC

6/f

OSC

12/f

OSC

24/f

OSC

D2 – D6 Fixed Off Time.

This five-bit word sets the fixed

off-time for the internal PWM control circuitry. The off-time is

defined by

t

off

=(8 [1 + N]/f

OSC

) - 1/f

OSC

where N = 0 .... 31

For example, with an oscillator frequency of 4 MHz, the

fixed off-time will be adjustable from 1.75

µs

to 63.75

µs

in

increments of 2

µs.

D7 – D10 Fast Decay Time.

This four-bit word sets the fast-

decay portion of the fixed off-time for the internal PWM control

circuitry. This will only have impact if mixed-decay mode is

selected (via bit D17). For t

fd

> t

off

, the device will effectively

operate in fast-decay mode. The fast-decay portion is defined

by

t

fd

= (8[1 + N]/f

OSC

] - 1/f

OSC

where N = 0 .... 15

For example, with an oscillator frequency of 4 MHz, the fast-

decay time will be adjustable from 1.75

µs

to 31.75

µs

in

increments of 2

µs.

D11 – D12 Synchronous Rectification.

D12

0

1

D11

0

1

0

1

Synchronous Rectifier

Disabled

Low side only

Active

Passive

The different modes of operation are described in the synchro-

nous rectification section of the functional description.

D13 External PWM Decay Mode.

This bit determines the

current-decay mode when using ENABLE chopping for

external PWM current control.

D13

0

1

Mode

Fast

Slow

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3974_1

3974_1 Overview

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