EEWORLDEEWORLDEEWORLD

Part Number

Search

531BA50M0000DG

Description
SINGLE FREQUENCY XO, OE PIN 1
CategoryPassive components    oscillator   
File Size450KB,12 Pages
ManufacturerSilicon Laboratories Inc
Environmental Compliance
Download Datasheet Parametric View All

531BA50M0000DG Online Shopping

Suppliers Part Number Price MOQ In stock  
531BA50M0000DG - - View Buy Now

531BA50M0000DG Overview

SINGLE FREQUENCY XO, OE PIN 1

531BA50M0000DG Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerSilicon Laboratories Inc
package instructionDILCC6,.2
Reach Compliance Codecompliant
Other featuresTRAY
maximum descent time0.35 ns
Frequency Adjustment - MechanicalNO
frequency stability50%
JESD-609 codee4
Manufacturer's serial number531
Installation featuresSURFACE MOUNT
Number of terminals6
Maximum operating frequency945 MHz
Minimum operating frequency10 MHz
Nominal operating frequency50 MHz
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Oscillator typeLVDS
Package body materialPLASTIC/EPOXY
Encapsulate equivalent codeDILCC6,.2
physical size7.0mm x 5.0mm x 1.85mm
power supply3.3 V
Certification statusNot Qualified
longest rise time0.35 ns
Maximum slew rate98 mA
Maximum supply voltage3.63 V
Minimum supply voltage2.97 V
Nominal supply voltage3.3 V
surface mountYES
maximum symmetry55/45 %
Terminal surfaceGold (Au) - with Nickel (Ni) barrier
Base Number Matches1
S i 5 3 0 / 5 31
R
EVISION
D
C
R YS TA L
O
SCILLATOR
(XO) (10 M H
Z
Features
Available with any-rate output
frequencies from 10 MHz to 945 MHz
and select frequencies to 1.4 GHz
3rd generation DSPLL
®
with superior
jitter performance
3x better frequency stability than
SAW-based oscillators
TO
1.4 GH
Z
)
Internal fixed crystal frequency
ensures high reliability and low
aging
Available CMOS, LVPECL,
LVDS, and CML outputs
3.3, 2.5, and 1.8 V supply options
Industry-standard 5 x 7 mm
package and pinout
Pb-free/RoHS-compliant
Si5602
Ordering Information:
See page 7.
Applications
SONET/SDH
Networking
SD/HD video
Test and measurement
Clock and data recovery
FPGA/ASIC clock generation
Pin Assignments:
See page 6.
(Top View)
NC
OE
GND
1
2
3
6
5
4
V
DD
Description
The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL circuitry
to provide a low jitter clock at high frequencies. The Si530/531 is available
with any-rate output frequency from 10 to 945 MHz and select frequencies to
1400 MHz. Unlike a traditional XO, where a different crystal is required for
each output frequency, the Si530/531 uses one fixed crystal to provide a
wide range of output frequencies. This IC based approach allows the crystal
resonator to provide exceptional frequency stability and reliability. In addition,
DSPLL clock synthesis provides superior supply noise rejection, simplifying
the task of generating low jitter clocks in noisy environments typically found in
communication systems. The Si530/531 IC based XO is factory configurable
for a wide variety of user specifications including frequency, supply voltage,
output format, and temperature stability. Specific configurations are factory
programmed at time of shipment, thereby eliminating long lead times
associated with custom oscillators.
®
CLK–
CLK+
Si530 (LVDS/LVPECL/CML)
OE
NC
GND
1
2
3
6
5
4
V
DD
Functional Block Diagram
V
DD
CLK– CLK+
NC
CLK
Si530 (CMOS)
Fixed
Frequency
XO
Any-rate
10–1400 MHz
DSPLL
®
Clock
Synthesis
OE
NC
GND
1
2
3
6
5
4
V
DD
CLK–
CLK+
Si531 (LVDS/LVPECL/CML)
OE
GND
Rev. 1.5 6/18
Copyright © 2018 by Silicon Laboratories
Si530/531
How to choose ARM9 development board
Please recommend an ARM9 development board, mainly for learning. The first consideration is whether the improved information is complete, and the second is the price. Please recommend it, I don't know...
jackiesh ARM Technology
Urgently hiring senior hardware engineer and hardware development manager (Guangzhou)
Senior Hardware Engineer, minimum annual salary of 100,000, depending on personal ability: 1 Familiar with single-chip microcomputer, digital circuit, familiar with VC/C++, Protel99, USB and NT progra...
younha Embedded System
[I contribute to the XILINX Resource Center] The most comprehensive FPGA paper collection in the history of EEWORD
The most complete FPGA paper collection in the history of EEWORD is 200M in size. It is not easy to upload it.[[i] This post was last edited by wanghongyang on 2011-4-27 12:18 [/i]]...
wanghongyang FPGA/CPLD
We recommend a DC signal generator (DC regulated power supply)
Could you please recommend a dual-channel DC signal generator (DC regulated power supply) with an output voltage of 0-30V (lower than 30V is also ok), high stability, small ripple factor, cheap price ...
zhy3928551 Test/Measurement
TMS320F28035 eQEP, encoder learning
Since QEP is used in DIY power supply, I will learn it temporarily:titter:I have read some information about encoders these days and have a general understanding of them. I will write down my understa...
lindabell DIY/Open Source Hardware
The suffocating moment of workers in the workplace!
The daily life of workers is full of challenges One careless It is easy to return the health bar to zero If you don't believe me, scroll down.01 Lateness8:27 Beijing time, decided to take a nap for an...
eric_wang Talking about work

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 1780  2594  236  348  1913  36  53  5  8  39 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号