74LVCH16374ABX,518 datasheet, PDF

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74LVCH16374ABX,518: DescriptionIC FF D-TYPE DUAL 8BIT 60HXQFN; Categorylogic logic; File Size733KB，20 Pages; ManufacturerNexperia; Websitehttps://www.nexperia.com

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74LVCH16374ABX,518 Overview

IC FF D-TYPE DUAL 8BIT 60HXQFN

74LVCH16374ABX,518 Parametric

Parameter Name	Attribute value
Brand Name	Nexperia
package instruction	HVBCC, LGA60,8X12,20
Contacts	QFN
Manufacturer packaging code	SOT1134-2
series	LVC/LCX/Z
JESD-30 code	R-PBCC-B60
JESD-609 code	e3
length	6 mm
Load capacitance (CL)	50 pF
Logic integrated circuit type	BUS DRIVER
Maximum Frequency@Nom-Sup	100000000 Hz
MaximumI(ol)	0.024 A
Humidity sensitivity level	2
Number of digits	8
Number of functions	2
Number of ports	2
Number of terminals	60
Maximum operating temperature	125 °C
Minimum operating temperature	-40 °C
Output characteristics	3-STATE
Output polarity	TRUE
Package body material	PLASTIC/EPOXY
encapsulated code	HVBCC
Encapsulate equivalent code	LGA60,8X12,20
Package shape	RECTANGULAR
Package form	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
method of packing	TAPE AND REEL
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	3.3 V
Prop。Delay @ Nom-Sup	7 ns
propagation delay (tpd)	7.5 ns
Certification status	Not Qualified
Maximum seat height	0.5 mm
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	1.65 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	AUTOMOTIVE
Terminal surface	MATTE TIN
Terminal form	BUTT
Terminal pitch	0.5 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	NOT SPECIFIED
Trigger type	POSITIVE EDGE
width	4 mm

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74LVC16374A; 74LVCH16374A

16-bit edge-triggered D-type flip-flop; 5 V tolerant; 3-state

Rev. 11 — 16 January 2013

Product data sheet

1. General description

The 74LVC16374A and 74LVCH16374A are 16-bit edge-triggered flip-flops featuring

separate D-type inputs with bus hold (74LVCH16374A only) for each flip-flop and 3-state

outputs for bus-oriented applications. It consists of two sections of eight positive

edge-triggered flip-flops. A clock input (nCP) and an output enable (nOE) are provided for

each octal.

The flip-flops store the state of their individual D-inputs that meet the set-up and hold time

requirements on the LOW-to-HIGH clock (CP) transition.

When pin nOE is LOW, the contents of the flip-flops are available at the outputs. When pin

nOE is HIGH, the outputs go to the high-impedance OFF-state. Operation of input nOE

does not affect the state of the flip-flops.

Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be

applied to the outputs. These features allow the use of these devices in mixed 3.3 V and

5 V applications.

Bus hold on data inputs eliminates the need for external pull-up resistors to hold unused

inputs.

2. Features and benefits



5 V tolerant inputs/outputs for interfacing with 5 V logic

Wide supply voltage range from 1.2 V to 3.6 V

CMOS low power consumption

Multibyte flow-through standard pinout architecture

Low inductance multiple supply pins for minimum noise and ground bounce

Direct interface with TTL levels

All data inputs have bus hold (74LVCH16374A only)

High-impedance outputs when V

= 0 V

Complies with JEDEC standard:



JESD8-7A (1.65 V to 1.95 V)



JESD8-5A (2.3 V to 2.7 V)



JESD8-C/JESD36 (2.7 V to 3.6 V)



ESD protection:



HBM JESD22-A114F exceeds 2000 V



MM JESD22-A115-B exceeds 200 V



CDM JESD22-C101E exceeds 1000 V



Specified from

40 C

to +85

C

and

40 C

to +125

C

74LVCH16374ABX,518 Related Products

	74LVCH16374ABX,518	74LVC16374ADGG,112	74LVCH16374ADL,112	74LVCH16374ADL,118	74LVC16374ADL,118	74LVC16374ADGG,118
Description	IC FF D-TYPE DUAL 8BIT 60HXQFN	IC FF D-TYPE DUAL 8BIT 48TSSOP	IC FF D-TYPE DUAL 8BIT 48SSOP	IC FF D-TYPE DUAL 8BIT 48SSOP	IC FF D-TYPE DUAL 8BIT 48SSOP	Type: D-type logic circuit Family: 74LVC Function: three-state, non-inverting
Brand Name	Nexperia	Nexperia	Nexperia	Nexperia	Nexperia	Nexperia
package instruction	HVBCC, LGA60,8X12,20	6.10 MM, ROHS COMPLIANT, PLASTIC, MO-153, SOT362-1, TSSOP-48	7.50 MM, PLASTIC, MO-118, SOT370-1, SSOP-48	7.50 MM, PLASTIC, MO-118, SOT370-1, SSOP-48	7.50 MM, PLASTIC, MO-118, SOT370-1, SSOP-48	6.10 MM, ROHS COMPLIANT, PLASTIC, MO-153, SOT362-1, TSSOP-48
Contacts	QFN	48	48	48	48	48
Manufacturer packaging code	SOT1134-2	SOT362-1	SOT370-1	SOT370-1	SOT370-1	SOT362-1
series	LVC/LCX/Z	LVC/LCX/Z	LVC/LCX/Z	LVC/LCX/Z	LVC/LCX/Z	LVC/LCX/Z
JESD-30 code	R-PBCC-B60	R-PDSO-G48	R-PDSO-G48	R-PDSO-G48	R-PDSO-G48	R-PDSO-G48
JESD-609 code	e3	e4	e4	e4	e4	e4
length	6 mm	12.5 mm	15.875 mm	15.875 mm	15.875 mm	12.5 mm
Logic integrated circuit type	BUS DRIVER	BUS DRIVER	BUS DRIVER	BUS DRIVER	BUS DRIVER	BUS DRIVER
Humidity sensitivity level	2	1	1	1	1	1
Number of digits	8	8	8	8	8	8
Number of functions	2	2	2	2	2	2
Number of ports	2	2	2	2	2	2
Number of terminals	60	48	48	48	48	48
Maximum operating temperature	125 °C	125 °C	125 °C	125 °C	125 °C	125 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C
Output characteristics	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE
Output polarity	TRUE	TRUE	TRUE	TRUE	TRUE	TRUE
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	HVBCC	TSSOP	SSOP	SSOP	SSOP	TSSOP
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
propagation delay (tpd)	7.5 ns	7.5 ns	7.5 ns	7.5 ns	7.5 ns	7.5 ns
Maximum seat height	0.5 mm	1.2 mm	2.8 mm	2.8 mm	2.8 mm	1.2 mm
Maximum supply voltage (Vsup)	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V
Minimum supply voltage (Vsup)	1.65 V	1.2 V	1.2 V	1.2 V	1.2 V	1.2 V
Nominal supply voltage (Vsup)	3.3 V	2.7 V	2.7 V	2.7 V	2.7 V	2.7 V
surface mount	YES	YES	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE
Terminal surface	MATTE TIN	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form	BUTT	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING
Terminal pitch	0.5 mm	0.5 mm	0.635 mm	0.635 mm	0.635 mm	0.5 mm
Terminal location	BOTTOM	DUAL	DUAL	DUAL	DUAL	DUAL
width	4 mm	6.1 mm	7.5 mm	7.5 mm	7.5 mm	6.1 mm
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	260	260	260	-	260
Maximum time at peak reflow temperature	NOT SPECIFIED	30	30	30	-	30
Is it Rohs certified?	-	conform to	conform to	conform to	conform to	conform to
Maker	-	Nexperia	Nexperia	Nexperia	Nexperia	Nexperia
Parts packaging code	-	TSSOP	SSOP	SSOP	SSOP	TSSOP
Reach Compliance Code	-	compliant	compliant	compliant	compliant	compliant
Is Samacsys	-	N	N	N	N	N
Base Number Matches	-	1	1	1	1	1

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