74LVC16244AEV/G:55 datasheet, PDF

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74LVC16244AEV/G:55: DescriptionIC BUF NON-INVERT 3.6V 56VFBGA; Categorylogic logic; File Size252KB，19 Pages; ManufacturerNexperia; Websitehttps://www.nexperia.com

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74LVC16244AEV/G:55 Overview

IC BUF NON-INVERT 3.6V 56VFBGA

74LVC16244AEV/G:55 Parametric

Parameter Name	Attribute value
Brand Name	Nexperia
Maker	Nexperia
Parts packaging code	BGA
package instruction	VFBGA-56
Contacts	56
Manufacturer packaging code	SOT702-1
Reach Compliance Code	compliant
Control type	ENABLE LOW
series	LVC/LCX/Z
JESD-30 code	R-PBGA-B56
length	7 mm
Load capacitance (CL)	50 pF
Logic integrated circuit type	BUS DRIVER
MaximumI(ol)	0.024 A
Humidity sensitivity level	2
Number of digits	4
Number of functions	4
Number of ports	2
Number of terminals	56
Maximum operating temperature	125 °C
Minimum operating temperature	-40 °C
Output characteristics	3-STATE
Output polarity	TRUE
Package body material	PLASTIC/EPOXY
encapsulated code	VFBGA
Encapsulate equivalent code	BGA56,6X10,25
Package shape	RECTANGULAR
Package form	GRID ARRAY, VERY THIN PROFILE, FINE PITCH
method of packing	TRAY
Peak Reflow Temperature (Celsius)	260
power supply	3.3 V
Prop。Delay @ Nom-Sup	5.5 ns
propagation delay (tpd)	6 ns
Certification status	Not Qualified
Maximum seat height	1 mm
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	1.2 V
Nominal supply voltage (Vsup)	2.7 V
surface mount	YES
technology	CMOS
Temperature level	AUTOMOTIVE
Terminal form	BALL
Terminal pitch	0.65 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	30
width	4.5 mm
Base Number Matches	1

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74LVC16244A; 74LVCH16244A

16-bit buffer/line driver; 5 V input/output tolerant; 3-state

Rev. 14 — 15 June 2017

Product data sheet

General description

The 74LVC16244A; 74LVCH16244A are 16-bit non-inverting buffer/line drivers with

3-state bus compatible outputs. The device can be used as four 4-bit buffers, two 8-bit

buffers or one 16-bit buffer. It features four output enable inputs, (1OE to 4OE) each

controlling four of the 3-state outputs. A HIGH on nOE causes the outputs to assume a

high-impedance OFF-state.

Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be

applied to the outputs. These features allow the use of these devices in mixed 3.3 V and

5 V applications.

The 74LVCH16244A bus hold on data inputs eliminates the need for external pull-up

resistors to hold unused inputs.

Features and benefits

•

5 V tolerant inputs/outputs for interfacing with 5 V logic

Wide supply voltage range from 1.2 V to 3.6 V

CMOS low power consumption

Multibyte flow-through standard pin-out architecture

Low inductance multiple power and ground pins for minimum noise and ground bounce

Direct interface with TTL levels

High-impedance when V

= 0 V

All data inputs have bus hold. (74LVCH16244A only)

Complies with JEDEC standard:

–

JESD8-7A (1.65 V to 1.95 V)

–

JESD8-5A (2.3 V to 2.7 V)

–

JESD8-C/JESD36 (2.7 V to 3.6 V)

•

ESD protection:

–

HBM JESD22-A114F exceeds 2000 V

–

MM JESD22-A115-B exceeds 200 V

–

CDM JESD22-C101E exceeds 1000 V

•

Specified from -40 °C to +85 °C and -40 °C to +125 °C

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