
MACHXO2 HIGH PERFORMANCE 640 LUT
| Parameter Name | Attribute value |
| Is it Rohs certified? | conform to |
| Maker | Lattice |
| package instruction | , |
| Reach Compliance Code | compliant |
| ECCN code | EAR99 |
| Samacsys Description | FPGA - Field Programmable Gate Array MachXO2 High Performance; 640 LUTs; 2.5/3.3V |
| JESD-30 code | S-XQCC-N48 |
| Humidity sensitivity level | 3 |
| Configurable number of logic blocks | 80 |
| Number of entries | 40 |
| Number of logical units | 640 |
| Output times | 40 |
| Number of terminals | 48 |
| Package shape | SQUARE |
| method of packing | TRAY |
| Peak Reflow Temperature (Celsius) | 260 |
| Programmable logic type | FIELD PROGRAMMABLE GATE ARRAY |
| Maximum supply voltage | 3.6 V |
| Minimum supply voltage | 2.375 V |
| Nominal supply voltage | 2.5 V |
| surface mount | YES |
| Terminal form | NO LEAD |
| Terminal location | QUAD |
| Maximum time at peak reflow temperature | NOT SPECIFIED |
| LCMXO2-640HC-4SG48C | DS1035 | LCMXO2-640HC-5SG48C | LCMXO2-640HC-6SG48C | LCMXO2-4000HC-C-EVN | |
|---|---|---|---|---|---|
| Description | MACHXO2 HIGH PERFORMANCE 640 LUT | FPGA, 133 MHz, PBGA132 | MACHXO2 HIGH PERFORMANCE 640 LUT | MACHXO2 HIGH PERFORMANCE 640 LUT | KIT DEVELOPMENT MACHXO2 PLD |