LTC4301L
Hot Swappable 2-Wire
Bus Buffer with Low Voltage
Level Translation
DESCRIPTIO
The LTC
®
4301L hot swappable, 2-wire bus buffer allows
I/O card insertion into a live backplane without corruption
of the data and clock busses. In addition, the LTC4301L
SDAIN and SCLIN pins are compatible with systems with
pull-up voltages as low as 1V. Control circuitry prevents
the backplane from being connected to the card until a
stop bit or a bus idle is present. When the connection is
made, the LTC4301L provides bidirectional buffering,
keeping the backplane and card capacitances isolated.
When driven low, the CS input pin allows the part to
connect after a stop bit or bus idle occurs. Driving CS high
breaks the connection between SCLIN and SCLOUT and
between SDAIN and SDAOUT. A logic high on READY
indicates that the backplane and card sides are connected
together.
The LTC4301L is offered in 8-pin DFN (3mm
×
3mm) and
MSOP packages.
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
Protected by U.S. Patents including 7032051.
FEATURES
■
■
■
■
■
■
■
■
■
■
■
Level Translates 1V Signals to Standard 3.3V and
5V Logic Rails
Allows Bus Pull-Up Voltages as Low as 1V on
SDAIN and SCLIN
Bidirectional Buffer* for SDA and SCL Lines
Increases Fanout
Prevents SDA and SCL Corruption During Live Board
Insertion and Removal from Backplane
Isolates Input SDA and SCL Line from Output
10kV Human Body Model ESD Protection
Supports Clock Stretching, Arbitration and
Synchronization
High Impedance SDA, SCL Pins for V
CC
= 0V
CS Gates Connection from Input to Output
Compatible with I
2
C
TM
, I
2
C Fast Mode and SMBus
Standards (Up to 400kHz Operation)
Small 8-Pin MSOP and DFN (3mm
×
3mm) Packages
APPLICATIO S
■
■
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■
Hot Board Insertion
Servers
Capacitance Buffer/Bus Extender
Desktop Computers
TYPICAL APPLICATIO
1.2V
Input-Output Connection
3.3V
0.01µF
2k
SDA
µP
SCL
2k
SDAIN
SCLIN
CS
GND
GND
4301l TA01a
V
CC
V
CC
SDAOUT
SCLOUT
READY
LTC4301L
10k
10k
SDA
SCL
OUTPUT
SIDE
20pF
0.5V/DIV
INPUT
SIDE
55pF
U
U
U
1µs/DIV
4301 TA01b
4301lfa
1
LTC4301L
ABSOLUTE
MAXIMUM
RATINGS
V
CC
to GND ................................................. –0.3V to 7V
SDAIN, SCLIN, SDAOUT, SCLOUT, CS ........ –0.3V to 7V
READY ........................................................ –0.3V to 6V
Operating Temperature Range
LTC4301LC ............................................. 0°C to 70°C
LTC4301LI .......................................... – 40°C to 85°C
PACKAGE/ORDER INFORMATION
TOP VIEW
CS 1
SCLOUT 2
SCLIN 3
GND 4
9
8
7
6
5
V
CC
SDAOUT
SDAIN
READY
CS
SCLOUT
SCLIN
GND
1
2
3
4
TOP VIEW
8
7
6
5
V
CC
SDAOUT
SDAIN
READY
DD PACKAGE
8-LEAD (3mm
×
3mm) PLASTIC DFN
T
JMAX
= 125°C,
θ
JA
= 43°C/W
EXPOSED PAD (PIN 9) IS GND
PCB CONNECTION OPTIONAL
ORDER PART NUMBER
LTC4301LCDD
LTC4301LIDD
DD PART MARKING
LBHS
Order Options
Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking:
http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
SYMBOL
V
CC
I
CC
PARAMETER
Positive Supply Voltage
Supply Current
Power Supply
The
●
indicates specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
CC
= 2.7V to 5.5V, unless otherwise noted.
CONDITIONS
●
V
CC
= 5.5V, V
SDAIN
= V
SCLIN
= 0V
V
CC
= 5.5V, CS = 5.5V
SDAOUT, SCLOUT Floating
I
PULLUP
= 3mA
CS from 0V to V
CC
Start-Up Circuitry
V
PRE
t
IDLE
RDY
VOL
V
THRCS
I
CS
Precharge Voltage
Bus Idle Time
READY Output Low Voltage
Connection Sense Threshold
CS Input Current
●
●
●
2
U
U
W
W W
U
W
(Note 1)
Storage Temperature Range
MSOP ............................................... – 65°C to 150°C
DFN .................................................. – 65°C to 125°C
Lead Temperature (Soldering, 10 sec).................. 300°C
MS8 PACKAGE
8-LEAD PLASTIC MSOP
T
JMAX
= 125°C,
θ
JA
= 200°C/W
ORDER PART NUMBER
LTC4301LCMS8
LTC4301LIMS8
MS8 PART MARKING
LTBHQ
MIN
2.7
TYP
MAX
5.5
UNITS
V
mA
µA
V
µs
V
V
µA
●
4.5
300
0.85
60
0.8
1.05
95
1.4
±0.1
6.2
1.25
175
0.4
2
±1
4301lfa
LTC4301L
ELECTRICAL CHARACTERISTICS
SYMBOL
V
THR
V
HYS
t
PLH
t
PHL
I
OFF
V
OS
C
IN
I
LEAK
V
OL
PARAMETER
SDAIN, SCLIN Logic Input Threshold Voltage
SDAOUT, SCLOUT Logic Input Threshold Voltage
The
●
indicates specifications which apply over the full operating
= 25°C. V
CC
= 2.7V to 5.5V, unless otherwise noted.
temperature range, otherwise specifications are at T
A
CONDITIONS
Rising Edge
Rising Edge
(Note 3)
(Note 3)
MIN
0.45
1.55
TYP
0.6
1.8
85
50
10
10
95
10
±0.1
10k to V
CC
on SDA, SCL, V
CC
= 3.3V,
SDA or SCL = 0.2V (Note 2)
(Note 3)
SDA, SCL Pins
SDA, SCL Pins,
I
SINK
= 3mA, V
CC
= 2.7V
SDA, SCL Pins,
I
SINK
= 1mA, V
CC
= 2.7V
(Note 3)
(Note 3)
(Note 3)
(Note 3)
(Note 3)
(Note 3)
(Note 3)
●
●
MAX
0.75
2.0
UNITS
V
V
mV
mV
ns
ns
µs
ns
µA
SDAIN, SCLIN Logic Input Threshold Hysteresis
SDAOUT, SCLOUT Logic Input Threshold Hysteresis
CS Delay On-Off
READY Delay Off-On
CS Delay Off-On
READY Delay On-Off
Ready Off Leakage Current
Input-Output Offset Voltage
Digital Input Capacitance SDAIN, SDAOUT,
SCLIN, SCLOUT
Input Leakage Current
Output Low Voltage, Input = 0V
Input-Output Connection
0
100
175
10
±5
0
0
0.4
0.2
mV
pF
µA
V
V
Timing Characteristics
f
I2C,MAX
t
BUF
t
HD,STA
t
SU,STA
t
SU,STO
t
HD,DATI
t
SU,DAT
I
2
C Maximum Operating Frequency
Bus Free Time Between Stop and Start
Condition
Hold Time After (Repeated) Start Condition
Repeated Start Condition Set-Up Time
Stop Condition Set-Up Time
Data Hold Time Input
Data Set-Up Time
400
600
1.3
100
0
0
0
100
kHz
µs
ns
ns
ns
ns
ns
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
The connection circuitry always regulates its output to a higher
voltage than its input. The magnitude of this offset voltage as a function of
the pull-up resistor and V
CC
voltage is shown in the Typical Performance
Characteristics section.
Note 3:
Determined by design, not tested in production.
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3
LTC4301L
TYPICAL PERFOR A CE CHARACTERISTICS
I
CC
vs Temperature
4.9
4.8
4.7
4.6
V
CC
= 3.3V
V
CC
= 2.7V
TIME (ns)
V
CC
= 5.5V
80
I
CC
(mA)
4.5
4.4
4.3
4.2
4.1
4.0
3.9
–80 –60 –40 –20 0 20 40 60
TEMPERATURE (°C)
80 100
4301 G01
60
V
OUT
– V
IN
(mV)
PI FU CTIO S
CS (Pin 1):
The connection sense pin is a 1.4V threshold
digital input pin. For normal operation CS is grounded.
Driving CS above the 1.4V threshold isolates SDAIN from
SDAOUT and SCLIN from SCLOUT and asserts READY
low.
SCLOUT (Pin 2):
Serial Clock Output. Connect this pin to
the SCL bus on the card.
SCLIN (Pin 3):
Serial Clock Input. Connect this pin to SCL
on the bus backplane.
GND (Pin 4, 9):
Ground. Connect this pin to a ground plane
for best results. Exposed pad (DFN package) is ground.
READY (Pin 5):
The READY pin is an open drain N-channel
MOSFET output which pulls down when CS is high or
when the start-up sequence described in the Operation
section has not been completed. READY goes high when
CS is low and a start-up is complete.
SDAIN (Pin 6):
Serial Data Input. Connect this pin to the
SDA bus on the backplane.
SDAOUT (Pin 7):
Serial Data Output. Connect this pin to
the SDA bus on the card.
V
CC
(Pin 8):
Main Input Supply. Place a bypass capacitor
of at least 0.01µF close to V
CC
for best results.
4
U W
Input – Output High to Low
Propagation Delay vs
Temperature
100
V
CC
= 2.7V
250
V
CC
= 3.3V
200
150
300
Connection Circuitry V
OUT
– V
IN
T
A
= 25°C
V
IN
= 0V
40
V
CC
= 5V
100
V
CC
= 3.3V
50
0
V
CC
= 5.5V
20
C
IN
= C
OUT
= 100pF
R
PULLUPIN
= R
PULLUPOUT
= 10k
–25
0
25
50
TEMPERATURE (°C)
75
100
4301 G02
0
–50
0
10,000
20,000
30,000
R
PULLUP
(Ω)
40,000
4301 G03
U
U
U
4301lfa
LTC4301L
BLOCK DIAGRA
W
LTC4301L Supply Independent 2-Wire Bus Buffer
PRECHARGE
V
CC
8
CONNECT PRECHARGE
CONNECT
6
SDAIN
R1
200k
R2
200k
SDAOUT
7
CONNECT
3
SCLIN
SCLOUT
2
LOGIC
0.6V
1.8V
PRECHARGE
CONNECT
CONNECT
95µs
DELAY
CONNECT
GND
4
READY
5
UVLO
4301l BD
1
CS
1.4V
4301lfa
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FPGA/CPLD
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