EEWORLDEEWORLDEEWORLD

Part Number

Search

532CB000230DG

Description
DUAL FREQUENCY XO, OE PIN 2
CategoryPassive components   
File Size457KB,12 Pages
ManufacturerSilicon Laboratories Inc
Download Datasheet Parametric View All

532CB000230DG Online Shopping

Suppliers Part Number Price MOQ In stock  
532CB000230DG - - View Buy Now

532CB000230DG Overview

DUAL FREQUENCY XO, OE PIN 2

532CB000230DG Parametric

Parameter NameAttribute value
typeXO (Standard)
Frequency - Output 122.5792MHz
Frequency - Output 224.576MHz
Frequency - Output 3-
Frequency - Output 4-
Functionenable/disable
outputCMOS
Voltage - Power3.3V
frequency stability±20ppm
Operating temperature-40°C ~ 85°C
Current - Power (maximum)88mA
size/dimensions0.276" long x 0.197" wide (7.00mm x 5.00mm)
high0.071"(1.80mm)
Package/casing6-SMD, no leads
Current - Power (disabled) (maximum)75mA
Si532
R
EVISION
D
D
U A L
F
REQUENCY
C
R Y S TA L
O
SCILLATOR
(X O )
(10 M H
Z TO
1 . 4 G H
Z
)
Features
Available with any-frequency output
frequencies from 10 MHz to 945 MHz
and select frequencies to 1.4 GHz
Two selectable output frequencies
rd
®
3 generation DSPLL with superior
jitter performance
3x better frequency stability than
SAW-based oscillators
Internal fixed crystal frequency
ensures high reliability and low
aging
Available CMOS, LVPECL,
LVDS, and CML outputs
3.3, 2.5, and 1.8 V supply options
Industry-standard 5 x 7 mm
package and pinout
Pb-free/RoHS-compliant
Si5602
Ordering Information:
See page 7.
Applications
SONET/SDH
Networking
SD/HD video
Test and measurement
Clock and data recovery
FPGA/ASIC clock generation
Pin Assignments:
See page 6.
(Top View)
FS
OE
GND
1
2
3
6
5
4
V
DD
Description
The Si532 dual frequency XO utilizes Silicon Laboratories’ advanced
DSPLL
®
circuitry to provide a low jitter clock at high frequencies. The Si532 is
available with any-frequency output frequency from 10 to 945 MHz and select
frequencies to 1400 MHz. Unlike a traditional XO where a different crystal is
required for each output frequency, the Si532 uses one fixed crystal
frequency to provide a wide range of output frequencies. This IC based
approach allows the crystal resonator to provide exceptional frequency
stability and reliability. In addition, DSPLL clock synthesis provides superior
supply noise rejection, simplifying the task of generating low jitter clocks in
noisy environments typically found in communication systems. The Si532 IC
based XO is factory configurable for a wide variety of user specifications
including frequency, supply voltage, output format, and temperature stability.
Specific configurations are factory programmed at time of shipment, thereby
eliminating long lead times associated with custom oscillators.
CLK–
CLK+
(LVDS/LVPECL/CML)
FS
OE
GND
1
2
3
6
5
4
V
DD
Functional Block Diagram
V
DD
CLK– CLK+
NC
CLK
(CMOS)
Fixed
Frequency
XO
Any-frequency
10–1400 MHz
DSPLL
®
Clock
Synthesis
FS
OE
GND
Rev. 1.4 6/18
Copyright © 2018 by Silicon Laboratories
Si532
【Xingkong Board Python Programming Learning Main Control Board】Review 2: Hardware System Familiarity
A week's work is finally over. I work overtime until late every day and don't have much time to learn the Xingkong board. I quickly take advantage of the weekend to play with it. As the saying goes, i...
天意无罪 Embedded System
[Xingkong Board Python Programming Learning Main Control Board] Evaluation 3. Introduction to the connection method of the development board
In the previous review, we had a preliminary understanding of the hardware system of the Xingkong board. This article introduces several connection methods of the Xingkong board.The Xingkong board sup...
天意无罪 Embedded System
MOS tube selection problem
I want to use a SOT23 MOS tube to drive a 24V/180MA solenoid valve. The maximum power dissipation here is 2.5W, but 24*0.18=4.32W. Is it not enough?...
sky999 PCB Design
3.3V decoder
Can you recommend a 4-16 decoder? The input voltage should be 3.3v, the output should be 3.3v or above, and the chip with fast conversion time is better....
戮默天下 XuanTie RISC-V Activity Zone
RS Decoding Technology in Ethernet Physical Coding Sublayer
[i=s]This post was last edited by jsjsjsj on 2022-11-13 15:35[/i]400G parallel RS decoding related code/documents....
jsjsjsj Integrated technical exchanges
Find the DC voltage output value of the diode
The forward tube voltage drop is 0.7V. How to calculate the DC voltage value of uO?...
LeenO Analog electronics

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 1173  1258  541  454  89  24  26  11  10  2 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号