EEWORLDEEWORLDEEWORLD

Part Number

Search

570FAC000833DGR

Description
ANY, I2C PROGRAMMABLE XO
CategoryPassive components   
File Size562KB,36 Pages
ManufacturerSilicon Laboratories Inc
Download Datasheet Parametric View All

570FAC000833DGR Online Shopping

Suppliers Part Number Price MOQ In stock  
570FAC000833DGR - - View Buy Now

570FAC000833DGR Overview

ANY, I2C PROGRAMMABLE XO

570FAC000833DGR Parametric

Parameter NameAttribute value
typeXO (Standard)
Available frequency range10MHz ~ 280MHz
Functionenable/disable
outputLVDS
Voltage - Power2.25 V ~ 2.75 V
frequency stability±50ppm
Frequency stability (overall)±61.5ppm
Operating temperature-40°C ~ 85°C
spread spectrum bandwidth-
Current - Power (maximum)108mA
grade-
Installation typesurface mount
Package/casing8-SMD, no leads
size/dimensions0.276" long x 0.197" wide (7.00mm x 5.00mm)
high0.071"(1.80mm)
Si 5 7 0 / S i 5 7 1
10 MH
Z
Features
TO
1.4 G H
Z
I
2
C P
ROGRAMMABLE
XO/VCXO
Any programmable output
frequencies from 10 to 945 MHz and
select frequencies to 1.4 GHz
I
2
C serial interface
3rd generation DSPLL
®
with superior
jitter performance
3x better frequency stability than
SAW-based oscillators
Internal fixed crystal frequency
ensures high reliability and low
aging
Available LVPECL, CMOS,
LVDS, and CML outputs
Industry-standard 5x7 mm
package
Pb-free/RoHS-compliant
1.8, 2.5, or 3.3 V supply
Si5602
Applications
Ordering Information:
SONET/SDH
xDSL
10 GbE LAN/WAN
ATE
High performance
instrumentation
Low-jitter clock generation
Optical modules
Clock and data recovery
See page 31.
Pin Assignments:
See page 30.
(Top View)
SDA
7
NC
1
6
V
DD
Description
The Si570 XO/Si571 VCXO utilizes Silicon Laboratories’ advanced DSPLL
®
circuitry to provide a low-jitter clock at any frequency. The Si570/Si571 are user-
programmable to any output frequency from 10 to 945 MHz and select frequencies
to 1400 MHz with <1 ppb resolution. The device is programmed via an I
2
C serial
interface. Unlike traditional XO/VCXOs where a different crystal is required for
each output frequency, the Si57x uses one fixed-frequency crystal and a DSPLL
clock synthesis IC to provide any-frequency operation. This IC-based approach
allows the crystal resonator to provide exceptional frequency stability and
reliability. In addition, DSPLL clock synthesis provides superior supply noise
rejection, simplifying the task of generating low-jitter clocks in noisy environments
typically found in communication systems.
OE
2
5
CLK–
GND
3
8
SCL
4
CLK+
Functional Block Diagram
V
DD
CLK-
CLK+
Si570
SDA
7
OE
Fixed
Frequency
XO
10-1400 MHz
DSPLL Clock
Synthesis
V
C
1
6
V
DD
SDA
SCL
OE
2
5
CLK–
Si571 only
ADC
GND
3
8
SCL
4
CLK+
GND
V
C
Si571
Si570/Si571
Rev. 1.6 6/18
Copyright © 2018 by Silicon Laboratories
Regarding the issue of changing data table fields in acoCE!
I am using the VOADO class, which includes CVOConnection and CVORecordset. When I modify records, the functions provided by this class cannot be used. I am so depressed. BOOL CVORecordset::SetFieldVal...
qdjxll Embedded System
[Repost] Detailed explanation of the basics of impedance matching
Basic Concepts The specific matching relationship between the load impedance and the internal impedance of the signal source during signal transmission. The relationship between the output impedance o...
皇华Ameya360 Integrated technical exchanges
Parallel LCD2402 display
void LCD_GpioInit(void){SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOD);// RS RW EN D0GPIODirModeSet(GPIO_PORTD_BASE , GPIO_PIN_7|GPIO_PIN_6|GPIO_PIN_5|GPIO_PIN_4,GPIO_DIR_MODE_OUT);GPIOPadConfigSet(GPIO_...
jinhailu2010 Microcontroller MCU
Wireless power supply full bridge output is abnormal?
I built a wireless power transmission circuit using TL494, IR2110, and IRF3205. I encountered some problems during the debugging process and could not find the clear cause. Please give me some advice....
且行且珍惜666 Power technology
Thesis, including program, briefly describes the butterfly algorithm principle of FFt algorithm
[i=s] This post was last edited by paulhyde on 2014-9-15 03:26 [/i] The paper, including the program, briefly describes the butterfly algorithm principle of the FFt algorithm...
huangyangaa Electronics Design Contest
Analysis of the amplifier circuit of the photoelectric smoke detector
[i=s] This post was last edited by xilibubo on 2018-11-22 10:00 [/i][color=#555555][size=14px]The number starting with U is connected to the mcu, R30 is not connected; [/size][/color] [color=#555555][...
xilibubo Analog electronics

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 2297  1117  2796  1455  1300  47  23  57  30  27 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号