24AA256/24LC256/24FC256
256K I
2
C Serial EEPROM
Device Selection Table
Part Number
24AA256
24LC256
24FC256
Note 1:
2:
V
CC
Range
1.7V-5.5V
2.5V-5.5V
1.7V-5.5V
100 kHz for V
CC
< 2.5V.
400 kHz for V
CC
< 2.5V.
Max. Clock Frequency
400 kHz
(1)
400 kHz
1 MHz
(2)
Temp. Ranges
I, E
I, E
I
Available Packages
MF, MS, P, SN, SM, MNY, ST, CS
MF, MS, P, SN, SM, MNY, ST
MF, MS, P, SN, SM, MNY, ST
Features
• Single Supply with Operation Down to 1.7V for
24AA256 and 24FC256 Devices, 2.5V for
24LC256 Devices
• Low-Power CMOS Technology:
- Write current: 3 mA, maximum
- Standby current: 1 µA maximum (I-temp.)
• Two-Wire Serial Interface, I
2
C Compatible
• Cascadable up to Eight Devices
• Schmitt Trigger Inputs for Noise Suppression
• Output Slope Control to Eliminate Ground Bounce
• 100 kHz, 400 kHz and 1 MHz Compatibility
• Page Write Time: 5 ms, maximum
• Self-Timed Erase/Write Cycle
• 64-Byte Page Write Buffer
• Hardware Write-Protect
• ESD Protection >4000V
• More than One Million Erase/Write Cycles
• Data Retention >200 years
• Factory Programming Available
• RoHS Compliant
• Temperature Ranges:
- Industrial (I):
-40C to +85C
- Extended (E):
-40C to +125C
• Automotive AEC-Q100 Qualified
Packages
• 8-Lead DFN, 8-Lead MSOP, 8-Lead PDIP,
8-Lead SOIC, 8-Lead SOIJ, 8-Lead TDFN,
8-Lead TSSOP and 8-Ball CSP
Description
The Microchip Technology Inc. 24XX256
(1)
is a 32K x 8
(256 Kbit) Serial Electrically Erasable PROM, capable
of operation across a broad voltage range (1.7V to
5.5V). It has been developed for advanced, low-power
applications such as personal communications or data
acquisition. This device also has a page write capability
of up to 64 bytes of data. This device is capable of both
random and sequential reads up to the 256K boundary.
Functional address lines allow up to eight devices on
the same bus, for up to 2 Mbit address space.
Note 1:
24XX256 is used in this document as a
generic part number for the 24AA256/
24LC256/24FC256 devices.
Package Types
8-Lead DFN/TDFN
(Top View)
24XX256
A0
1
8
7
6
5
V
CC
WP
SCL
SDA
A1 2
A2 3
V
SS
4
Note
1:
8-Lead PDIP/MSOP
(Top View)
A0
A1
A2
V
SS
1
1
8
8
(1)
8-Lead SOIC/SOIJ/TSSOP
(Top View)
2
3
4
24XX256
A0
A1
A2
V
SS
1
8
7
6
5
V
CC
WP
SCL
SDA
WP
8-Ball CSP
(Top View)
V
CC
A1 A0
1
4
6
7
2
5
8
3
A2
V
CC
WP
SCL
SDA
2
2
3
3
4
4
24XX256
7
7
6
6
5
5
SDA SCL V
SS
Pins A0 and A1 are no connects for the MSOP package only.
1998-2019 Microchip Technology Inc.
DS20001203W-page 1
24AA256/24LC256/24FC256
Block Diagram
A0 A1A2 WP
HV Generator
I/O
Control
Logic
Memory
Control
Logic
XDEC
EEPROM
Array
Page Latches
I/O
SCL
YDEC
SDA
V
CC
V
SS
Sense Amp.
R/W Control
DS20001203W-page 2
1998-2019 Microchip Technology Inc.
24AA256/24LC256/24FC256
1.0
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings
(†)
V
CC
.............................................................................................................................................................................6.5V
All inputs and outputs w.r.t. V
SS
..........................................................................................................-0.6V to V
CC
+1.0V
Storage temperature ............................................................................................................................... -65°C to +150°C
Ambient temperature with power applied................................................................................................ -40°C to +125°C
ESD protection on all pins
4
kV
† NOTICE:
Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only and functional operation of the device at these or any other conditions above those
indicated in the operational listings of this specification is not implied. Exposure to Absolute Maximum Rating
conditions for extended periods may affect device reliability.
TABLE 1-1:
DC CHARACTERISTICS
Electrical Characteristics:
Industrial (I):
V
CC
= +1.7V to 5.5V
Extended (E):
V
CC
= +1.7V to 5.5V
Characteristic
High-Level Input Voltage
Low-Level Input Voltage
Hysteresis of Schmitt Trigger
Inputs (SDA, SCL pins)
Low-Level Output Voltage
Input Leakage Current
Output Leakage Current
Pin Capacitance
(all inputs/outputs)
Min.
0.7 V
CC
—
0.05 V
CC
—
—
—
—
—
—
Standby Current
—
—
—
Max.
—
0.3 V
CC
0.2 V
CC
—
0.40
±1
±1
10
400
3
1
1.5
5
Units
V
V
V
V
V
µA
µA
pF
µA
mA
µA
µA
µA
V
CC
2.5V
V
CC
< 2.5V
V
CC
2.5V (Note)
I
OL
= 3.0 mA @ V
CC
= 4.5V
I
OL
= 2.1 mA @ V
CC
= 2.5V
V
IN
= V
SS
or V
CC
, WP = V
SS
V
IN
= V
SS
or V
CC
, WP = V
CC
V
OUT
= V
SS
or V
CC
V
CC
= 5.0V (Note)
T
A
= 25°C, F
CLK
= 1 MHz
V
CC
= 5.5V, SCL = 400 kHz
V
CC
= 5.5V
SDA = SCL = V
CC
= 3.6V
A0, A1, A2, WP = V
SS
, I-Temp.
SDA = SCL = V
CC
= 5.5V
A0, A1, A2, WP = V
SS
, I-Temp.
SDA = SCL = V
CC
= 5.5V
A0, A1, A2, WP = V
SS
, E-Temp.
T
A
= -40°C to +85°C
T
A
= -40°C to +125°C
Conditions
DC CHARACTERISTICS
Param.
Symbol
No.
D1
D2
D3
D4
D5
D6
D7
D8
D9
V
IH
V
IL
V
HYS
V
OL
I
LI
I
LO
C
IN
,
C
OUT
I
CC
Write
I
CCS
I
CC
Read Operating Current
Note:
This parameter is periodically sampled and not 100% tested.
1998-2019 Microchip Technology Inc.
DS20001203W-page 3
24AA256/24LC256/24FC256
TABLE 1-2:
AC CHARACTERISTICS
Electrical Characteristics:
Industrial (I):
V
CC
= +1.7V to 5.5V
Extended (E):
V
CC
= +1.7V to 5.5V
Characteristic
Clock Frequency
Min.
—
—
—
—
2
T
HIGH
Clock High Time
4000
600
600
500
3
T
LOW
Clock Low Time
4700
1300
1300
500
4
T
R
SDA and SCL Rise Time
—
—
—
5
T
F
SDA and SCL Fall Time
—
—
6
T
HD
:
STA
Start Condition Hold Time
4000
600
600
250
7
T
SU
:
STA
Start Condition Setup Time
4700
600
600
250
8
9
T
HD
:
DAT
Data Input Hold Time
T
SU
:
DAT
Data Input Setup Time
0
250
100
100
10
T
SU
:
STO
Stop Condition Setup Time
4000
600
600
250
Note 1:
2:
3:
4:
Max.
100
400
400
1000
—
—
—
—
—
—
—
—
1000
300
300
300
100
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Units
kHz
kHz
kHz
kHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
T
A
= -40°C to +85°C
T
A
= -40°C to +125°C
Conditions
1.7V
V
CC
2.5V
2.5V
V
CC
5.5V
1.7V
V
CC
2.5V (24FC256)
2.5V
V
CC
5.5V (24FC256)
1.7V
V
CC
2.5V
2.5V
V
CC
5.5V
1.7V
V
CC
2.5V (24FC256)
2.5V
V
CC
5.5V (24FC256)
1.7V
V
CC
2.5V
2.5V
V
CC
5.5V
1.7V
V
CC
2.5V (24FC256)
2.5V
V
CC
5.5V (24FC256)
1.7V
V
CC
2.5V (Note
1)
2.5V
V
CC
5.5V (Note
1)
1.7V
V
CC
5.5V (24FC256)
(Note
1)
All except 24FC256 (Note
1)
1.7V
V
CC
5.5V (24FC256)
(Note
1)
1.7V
V
CC
2.5V
2.5V
V
CC
5.5V
1.7V
V
CC
2.5V (24FC256)
2.5V
V
CC
5.5V (24FC256)
1.7V
V
CC
2.5V
2.5V
V
CC
5.5V
1.7V
V
CC
2.5V (24FC256)
2.5V
V
CC
5.5V (24FC256)
Note 2
1.7V
V
CC
2.5V
2.5V
V
CC
5.5V
1.7V
V
CC
5.5V (24FC256)
1.7V
V
CC
2.5V
2.5V
V
CC
5.5V
1.7V
V
CC
2.5V (24FC256)
2.5V
V
CC
5.5V (24FC256)
AC CHARACTERISTICS
Param.
Symbol
No.
1
F
CLK
Not 100% tested. C
B
= total capacitance of one bus line in pF.
As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region
(minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.
The combined T
SP
and V
HYS
specifications are due to new Schmitt Trigger inputs, which provide improved
noise spike suppression. This eliminates the need for a T
I
specification for standard operation.
This parameter is not tested but ensured by characterization. For endurance estimates in a specific
application, please consult the Total Endurance™ Model, which can be obtained from Microchip’s website
at www.microchip.com.
DS20001203W-page 4
1998-2019 Microchip Technology Inc.
24AA256/24LC256/24FC256
TABLE 1-2:
AC CHARACTERISTICS
Electrical Characteristics:
Industrial (I):
V
CC
= +1.7V to 5.5V
Extended (E):
V
CC
= +1.7V to 5.5V
Min.
4000
600
600
12
T
HD
:
WP
WP Hold Time
4700
1300
1300
13
T
AA
Output Valid from Clock
—
—
—
—
14
T
BUF
Bus Free Time: The time the
bus must be free before a new
transmission can start
4700
1300
1300
500
15
T
OF
Output fall time from V
IH
minimum to V
IL
maximum
C
B
100 pF
Input Filter Spike Suppression
(SDA and SCL pins)
Write Cycle Time
(byte or page)
Endurance
10 + 0.1C
B
Max.
—
—
—
—
—
—
3500
900
900
400
—
—
—
—
250
250
—
—
1,000,000
50
5
—
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
cycles 25°C, 5.5V, Page mode (Note
4)
T
A
= -40°C to +85°C
T
A
= -40°C to +125°C
Conditions
1.7V
V
CC
2.5V
2.5V
V
CC
5.5V
1.7V
V
CC
5.5V (24FC256)
1.7V
V
CC
2.5V
2.5V
V
CC
5.5V
1.7V
V
CC
5.5V (24FC256)
1.7 V
V
CC
2.5V (Note
2)
2.5 V
V
CC
5.5V (Note
2)
1.7V
V
CC
2.5V (24FC256)
(Note
2)
2.5 V
V
CC
5.5V (24FC256)
(Note
2)
1.7V
V
CC
2.5V
2.5V
V
CC
5.5V
1.7V
V
CC
2.5V (24FC256)
2.5V
V
CC
5.5V (24FC256)
All except 24FC256 (Note
1)
All except 24FC256 (Note
1)
All except 24FC256
(Notes
1
and
3)
AC CHARACTERISTICS (Continued)
Param.
Symbol
No.
11
Characteristic
T
SU
:
WP
WP Setup Time
16
17
18
Note 1:
2:
3:
4:
T
SP
T
WC
Not 100% tested. C
B
= total capacitance of one bus line in pF.
As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region
(minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.
The combined T
SP
and V
HYS
specifications are due to new Schmitt Trigger inputs, which provide improved
noise spike suppression. This eliminates the need for a T
I
specification for standard operation.
This parameter is not tested but ensured by characterization. For endurance estimates in a specific
application, please consult the Total Endurance™ Model, which can be obtained from Microchip’s website
at www.microchip.com.
1998-2019 Microchip Technology Inc.
DS20001203W-page 5
DSP and ARM Processors
京公网安备 11010802033920号
EEWORLD
