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MKL27Z128VLH4R

Description
KINETIS L 32-BIT MCU ARM CORTEX
Categorysemiconductor    The embedded processor and controller   
File Size333KB,3 Pages
ManufacturerNXP
Websitehttps://www.nxp.com
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MKL27Z128VLH4R Overview

KINETIS L 32-BIT MCU ARM CORTEX

MKL27Z128VLH4R Parametric

Parameter NameAttribute value
core processorARM® Cortex®-M0+
core size32-bit
speed48MHz
ConnectivityI²C,SPI,UART/USART,USB
PeripheralDMA,I²S,LVD,POR,PWM,WDT
Number of I/Os50
Program storage capacity128KB(128K x 8)
Program memory typeflash memory
EEPROM capacity-
RAM capacity32K x 8
Voltage - Power Supply (Vcc/Vdd)1.71 V ~ 3.6 V
data converterA/D 16x16b,D/A 1x12b
Oscillator typeinternal
Operating temperature-40°C ~ 105°C(TA)
Package/casing64-LQFP
Supplier device packaging64-LQFP(10x10)
Ultra-low-power
MCUs with
USB OTG
Kinetis
®
KL2x MCU Family
The Kinetis KL2x family of MCUs based on ARM
®
Cortex
®
-M0+ cores combines ultra-
low-power performance with a rich suite of analog, communication, timing and control
peripherals, including a USB 2.0 On-The-Go controller.
TARGET APPLICATIONS
}
Battery-operated applications
}
Consumer applications
}
Low-power applications
}
USB peripherals
Family members start from 32 KB of flash in a small 3.5 x
3.5 mm
2
XFBGA package, extending up to 512 KB in a 121
MAPBGA package. The KL2x MCU family is compatible
with the Cortex-M4-core-based Kinetis K20 MCU family,
offering a migration path to higher performance and
feature integration.
FEATURES
Ultra-Low-Power
}
Next-generation 32-bit Cortex-M0+ core with two times
more CoreMarks
®
/mA than the closest 8-/16-bit architecture
}
Single-cycle fast I/O access port facilitates bit banging
and software protocol emulation, maintaining an 8-bit
'look and feel'
}
Multiple flexible low-power modes, including new
compute mode which reduces dynamic power by placing
peripherals in an asynchronous stop mode
}
LPUART, SPI, I
2
C, Flex
I/O, ADC, DAC, LP timer and DMA
support low-power mode operation without waking up the core
Memory
}
Up to 512 KB flash with 64-byte flash cache, up to
128 KB RAM
}
16 to 32 KB ROM with integrated bootloader
}
Security circuitry to prevent unauthorized access to RAM and
flash contents
Performance
}
Cortex-M0+ core running at up to 72 MHz (up to 96 MHz
for high-speed run) over full voltage and temperature range
(–40 ˚C +105 ˚C)
}
Bit manipulation engine for improved bit handling of
peripheral modules
}
Thumb
®
instruction set combines high code density with
32-bit performance
}
4–8 channel DMA for peripheral and memory servicing with
reduced CPU loading and faster system throughput
}
Independent-clocked COP guards against clock skew or
code runaway for fail-safe applications

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Number of I/Os 50 23 I/O 50 I/O 23

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