STM32F745xx
STM32F746xx
ARM
®
-based Cortex
®
-M7 32b MCU+FPU, 462DMIPS, up to 1MB Flash/320+16+ 4KB
RAM, USB OTG HS/FS, ethernet, 18 TIMs, 3 ADCs, 25 com itf, cam & LCD
Datasheet
-
production data
Features
•
Core: ARM
®
32-bit Cortex
®
-M7 CPU with FPU,
adaptive real-time accelerator (ART
Accelerator™) and L1-cache: 4KB data cache
and 4KB instruction cache, allowing 0-wait
state execution from embedded Flash memory
and external memories, frequency up to
216 MHz, MPU, 462 DMIPS/2.14 DMIPS/MHz
(Dhrystone 2.1), and DSP instructions.
•
Memories
– Up to 1MB of Flash memory
– 1024 bytes of OTP memory
– SRAM: 320KB (including 64KB of data
TCM RAM for critical real-time data) +
16KB of instruction TCM RAM (for critical
real-time routines) + 4KB of backup SRAM
(available in the lowest power modes)
– Flexible external memory controller with up
to 32-bit data bus: SRAM, PSRAM,
SDRAM/LPSDR SDRAM, NOR/NAND
memories
•
Dual mode Quad-SPI
•
LCD parallel interface, 8080/6800 modes
•
LCD-TFT controller up to XGA resolution with
dedicated Chrom-ART Accelerator™ for
enhanced graphic content creation (DMA2D)
•
Clock, reset and supply management
– 1.7 V to 3.6 V application supply and I/Os
– POR, PDR, PVD and BOR
– Dedicated USB power
– 4-to-26 MHz crystal oscillator
– Internal 16 MHz factory-trimmed RC (1%
accuracy)
– 32 kHz oscillator for RTC with calibration
– Internal 32 kHz RC with calibration
•
Low-power
– Sleep, Stop and Standby modes
– V
BAT
supply for RTC, 32×32 bit backup
registers + 4KB backup SRAM
•
3×12-bit, 2.4 MSPS ADC: up to 24 channels
and 7.2 MSPS in triple interleaved mode
•
2×12-bit D/A converters
•
Up to 18 timers: up to thirteen 16-bit (1x low-
power 16-bit timer available in Stop mode) and
two 32-bit timers, each with up to 4
IC/OC/PWM or pulse counter and quadrature
(incremental) encoder input. All 15 timers
running up to 216 MHz. 2x watchdogs, SysTick
timer
LQFP100 (14x14 mm)
LQFP144 (20x20 mm)
LQFP176 (24x24 mm)
LQFP208 (28x28 mm)
UFBGA176 (10x10 mm)
TFBGA216 (13x13 mm)
TFBGA100 (8x8 mm)
WLCSP143
(4.5x5.8 mm)
•
General-purpose DMA: 16-stream DMA
controller with FIFOs and burst support
•
Debug mode
– SWD & JTAG interfaces
– Cortex
®
-M7 Trace Macrocell™
•
Up to 168 I/O ports with interrupt capability
– Up to 164 fast I/Os up to 108 MHz
– Up to 166 5 V-tolerant I/Os
•
Up to 25 communication interfaces
– Up to 4× I
2
C interfaces (SMBus/PMBus)
– Up to 4 USARTs/4 UARTs (27 Mbit/s,
ISO7816 interface, LIN, IrDA, modem
control)
– Up to 6 SPIs (up
2
to 50 Mbit/s), 3 with
muxed simplex I S for audio class
accuracy via internal audio PLL or external
clock
– 2 x SAIs (serial audio interface)
– 2 × CANs (2.0B active) and SDMMC
interface
– SPDIFRX interface
– HDMI-CEC
•
Advanced connectivity
– USB 2.0 full-speed device/host/OTG
controller with on-chip PHY
– USB 2.0 high-speed/full-speed
device/host/OTG controller with dedicated
DMA, on-chip full-speed PHY and ULPI
– 10/100 Ethernet MAC with dedicated DMA:
supports IEEE 1588v2 hardware, MII/RMII
•
8- to 14-bit parallel camera interface up to
54 Mbyte/s
•
True random number generator
•
CRC calculation unit
•
RTC: subsecond accuracy, hardware calendar
•
96-bit unique ID
Table 1. Device summary
Reference
STM32F745xx
Part number
STM32F745IE, STM32F745VE, STM32F745VG,
STM32F745ZE, STM32F745ZG, STM32F745IG
STM32F746BE, STM32F746BG, STM32F746IE,
STM32F746IG, STM32F746NE, STM32F746NG,
STM32F746VE, STM32F746VG, STM32F746ZE,
STM32F746ZG
STM32F746xx
February 2016
This is information on a product in full production.
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Contents
STM32F745xx STM32F746xx
Contents
1
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
1.1
Full compatibility throughout the family . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2
Functional overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
2.10
2.11
2.12
2.13
2.14
2.15
2.16
2.17
ARM
®
Cortex
®
-M7 with FPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Memory protection unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Embedded Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
CRC (cyclic redundancy check) calculation unit . . . . . . . . . . . . . . . . . . . 18
Embedded SRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
AXI-AHB bus matrix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
DMA controller (DMA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Flexible memory controller (FMC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Quad-SPI memory interface (QUADSPI) . . . . . . . . . . . . . . . . . . . . . . . . . 21
LCD-TFT controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Chrom-ART Accelerator™ (DMA2D) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Nested vectored interrupt controller (NVIC) . . . . . . . . . . . . . . . . . . . . . . . 22
External interrupt/event controller (EXTI) . . . . . . . . . . . . . . . . . . . . . . . . . 22
Clocks and startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Boot modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Power supply schemes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Power supply supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
2.17.1
2.17.2
Internal reset ON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Internal reset OFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Regulator ON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Regulator OFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Regulator ON/OFF and internal reset ON/OFF availability . . . . . . . . . . 30
2.18
Voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
2.18.1
2.18.2
2.18.3
2.19
2.20
2.21
2.22
Real-time clock (RTC), backup SRAM and backup registers . . . . . . . . . . 30
Low-power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
V
BAT
operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Timers and watchdogs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
2.22.1
Advanced-control timers (TIM1, TIM8) . . . . . . . . . . . . . . . . . . . . . . . . . 34
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2.22.2
2.22.3
2.22.4
2.22.5
2.22.6
2.22.7
Contents
General-purpose timers (TIMx) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Basic timers TIM6 and TIM7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Low-power timer (LPTIM1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Independent watchdog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Window watchdog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
SysTick timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
2.23
2.24
2.25
2.26
2.27
2.28
2.29
2.30
2.31
2.32
2.33
2.34
2.35
2.36
2.37
2.38
2.39
2.40
2.41
2.42
2.43
Inter-integrated circuit interface (I
2
C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Universal synchronous/asynchronous receiver transmitters (USART) . . 37
Serial peripheral interface (SPI)/inter- integrated sound interfaces (I2S) . 38
Serial audio interface (SAI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
SPDIFRX Receiver Interface (SPDIFRX) . . . . . . . . . . . . . . . . . . . . . . . . . 39
Audio PLL (PLLI2S) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Audio and LCD PLL(PLLSAI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
SD/SDIO/MMC card host interface (SDMMC) . . . . . . . . . . . . . . . . . . . . . 40
Ethernet MAC interface with dedicated DMA and IEEE 1588 support . . . 40
Controller area network (bxCAN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Universal serial bus on-the-go full-speed (OTG_FS) . . . . . . . . . . . . . . . . 41
Universal serial bus on-the-go high-speed (OTG_HS) . . . . . . . . . . . . . . . 41
High-definition multimedia interface (HDMI) - consumer
electronics control (CEC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Digital camera interface (DCMI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Random number generator (RNG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
General-purpose input/outputs (GPIOs) . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Analog-to-digital converters (ADCs) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Temperature sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Digital-to-analog converter (DAC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Serial wire JTAG debug port (SWJ-DP) . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Embedded Trace Macrocell™ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
3
4
5
Pinouts and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
5.1
Parameter conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
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Contents
5.1.1
5.1.2
5.1.3
5.1.4
5.1.5
5.1.6
5.1.7
STM32F745xx STM32F746xx
Minimum and maximum values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
Typical values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
Typical curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
Loading capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
Power supply scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
Current consumption measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
5.2
5.3
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
5.3.1
5.3.2
5.3.3
5.3.4
5.3.5
5.3.6
5.3.7
5.3.8
5.3.9
5.3.10
5.3.11
5.3.12
5.3.13
5.3.14
5.3.15
5.3.16
5.3.17
5.3.18
5.3.19
5.3.20
5.3.21
5.3.22
5.3.23
5.3.24
5.3.25
5.3.26
5.3.27
5.3.28
General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
VCAP1/VCAP2 external capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
Operating conditions at power-up / power-down (regulator ON) . . . . . 101
Operating conditions at power-up / power-down (regulator OFF) . . . . 101
Reset and power control block characteristics . . . . . . . . . . . . . . . . . . 101
Over-drive switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 103
Supply current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
Wakeup time from low-power modes . . . . . . . . . . . . . . . . . . . . . . . . . . 121
External clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 122
Internal clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 127
PLL characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128
PLL spread spectrum clock generation (SSCG) characteristics . . . . . 131
Memory characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133
EMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135
Absolute maximum ratings (electrical sensitivity) . . . . . . . . . . . . . . . . 137
I/O current injection characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 137
I/O port characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138
NRST pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 144
TIM timer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 145
RTC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 145
12-bit ADC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 145
Temperature sensor characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 151
V
BAT
monitoring characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 151
Reference voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 151
DAC electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 152
Communications interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 154
FMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 169
Quad-SPI interface characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 189
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5.3.31
Contents
Camera interface (DCMI) timing specifications . . . . . . . . . . . . . . . . . . 191
LCD-TFT controller (LTDC) characteristics . . . . . . . . . . . . . . . . . . . . . 192
SD/SDIO MMC card host interface (SDMMC) characteristics . . . . . . . 194
6
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 196
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
6.9
LQFP100, 14 x 14 mm low-profile quad flat package information . . . . . 196
TFBGA100, 8 x 8 x 0.8 mm thin fine-pitch ball grid array
package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 199
WLCSP143, 4.539x 5.849 mm, 0.4 mm pitch wafer level chip
scale package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 202
LQFP144, 20 x 20 mm low-profile quad flat package information . . . . . 205
LQFP176, 24 x 24 mm low-profile quad flat package information . . . . . 208
LQFP208, 28 x 28 mm low-profile quad flat package information . . . . . 212
UFBGA 176+25, 10 x 10 x 0.65 mm ultra thin-pitch ball grid
array package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 216
TFBGA216, 13 × 13 × 0.8 mm thin fine-pitch ball grid array
package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 219
Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 222
7
Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 223
Appendix A Recommendations when using internal reset OFF . . . . . . . . . . . 224
A.1
Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 224
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 225
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