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PI3WVR12412ZHE+DRX

Description
DISPLAY SWITCH V-QFN3590-42 T&R;
Categorysemiconductor    Analog mixed-signal IC   
File Size989KB,14 Pages
ManufacturerDiodes
Websitehttp://www.diodes.com/
Download Datasheet Compare View All

PI3WVR12412ZHE+DRX Overview

DISPLAY SWITCH V-QFN3590-42 T&R;

A product Line of
Diodes Incorporated
PI3WVR12412
HDMI 2.0, DisplayPort 1.2 Video Switch
Features
ÎÎ
4-lane, 1:2 mux/demux that will support RBR, HBR1, or
Description
The PI3WVR12412 is a multi-standard video switch with wide
voltage range capability. It supports HDMI 2.0, DisplayPort 1.2,
and emerging and proprietary standard.
PI3WVR12412 can pass high-speed signals up to 1.2 V
peak-to-peak differential with a common-mode voltage from 0 to
3.4V for TMDS signal.
The wide voltage range allow DC-coupled multi-standard
operation. Eliminating AC coupling capacitors saves board space
and improves signal integrity for dense PCB design. The high
speed channels can also pass 0V-3.3V CMOS signals up to 1MHz.
In addition to four high-speed lanes, PI3WVR12412 also
switches the DDC and HPD signals or AUX and HPD signals
using the DDC/ AUX and HPD channel mux/demux.
HBR2
ÎÎ
Data rate: 3.4 Gbps to 6.0 Gbps for high data channels
ÎÎ
Supports DDC with HPD channel
mux/demux @ HDMI
ÎÎ
Supports 720 Mbps high-speed DP AUX @ DP
ÎÎ
-1.7 dB Insertion Loss for Dx channels @ 3.0 GHz
ÎÎ
dB Bandwidth for Dx channels:
-3
4.8 GHz
-16 dB
-22dB@6.0 Gbps
ÎÎ
Return loss for Dx channels @ 3.0 GHz:
ÎÎ
Low Crosstalk for high speed channels: -25 dB@6.0 Gbps
ÎÎ
Low Off Isolation for high speed channels:
ÎÎ
Low channel-to-channel skew, 35ps max
ÎÎ
Low Bit-to-Bit Skew, 5ps typ (between '+' and '-' bits)
ÎÎ
DD
Operating Range: 3.3V +/-10%
V
ÎÎ
ESD Tolerance: 2kV HBM
ÎÎ
Packaging (Pb-free & Green): 42 TQFN (ZHE)
Application
ÎÎ
Routing of HDMI 2.0 video signals with low signal attenuation
between source and sink for 4K2K ultra high definition video
display and broadcast video equipment.
ÎÎ
Routing
of DisplayPort video signals with low signal
attenuation between source and sink for PC and monitor.
D0+A
D0-A
D1+A
D1-A
D2+A
D2-A
D3+A
D3-A
D0+B
D0-B
D1+B
D1-B
D2+B
D2-B
D3+B
D3-B
Block Diagram
D0+
D0
-
D1+
D1
-
D2+
D2-
D3+
D3-
SCL/ AUX+
SDA/ AUX-
HPD
SCL A/ AUX+ A
SDA A/ AUX- A
HPD A
SCL B/ AUX+ B
SDA B/ AUX- B
HPD B
GPU_SEL
DDC/ AUX_HPD_SEL
OE
Logic
Control
PI3WVR12412
Document Number DS40196 Rev 1-2
1
www.diodes.com
September 2017
Diodes Incorporated

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