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PIC16F18456T-I/SS

Description
COMPARATOR, DAC, 12-BIT ADCC
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size6MB,760 Pages
ManufacturerMicrochip
Websitehttps://www.microchip.com
Download Datasheet Parametric View All

PIC16F18456T-I/SS Overview

COMPARATOR, DAC, 12-BIT ADCC

PIC16F18456T-I/SS Parametric

Parameter NameAttribute value
MakerMicrochip
package instructionSSOP-28
Reach Compliance Codecompliant
Factory Lead Time9 weeks
Samacsys Description8-bit Microcontrollers - MCU 28KB, 2KB RAM, 2xPWMs, Comparator, DAC, 12-bit ADCC, CWG, EUSART, 2 SPI/I2C
Has ADCYES
Other featuresALSO OPERATES WITH 2.3VMIN @ 16 MHZ
Address bus width
maximum clock frequency32 MHz
DAC channelYES
DMA channelNO
External data bus width
JESD-30 codeR-PDSO-G28
length10.2 mm
Number of I/O lines26
Number of terminals28
On-chip program ROM width14
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
PWM channelYES
Package body materialPLASTIC/EPOXY
encapsulated codeSSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE, SHRINK PITCH
ROM programmabilityFLASH
Filter levelTS 16949
Maximum seat height2 mm
speed32 MHz
Maximum supply voltage5.5 V
Minimum supply voltage2.5 V
Nominal supply voltage3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationDUAL
width5.3 mm
uPs/uCs/peripheral integrated circuit typeMICROCONTROLLER, RISC
PIC16(L)F18455/56
28-Pin Full-Featured, Low Pin Count Microcontrollers with
XLP
Description
PIC16(L)F184XX microcontrollers feature Intelligent Analog, Core Independent Peripherals (CIPs) and
communication peripherals combined with eXtreme Low-Power (XLP) for a wide range of general
purpose and low-power applications. Features such as a 12-bit Analog-to-Digital Converter with
Computation (ADC
2
), Memory Access Partitioning (MAP), the Device Information Area (DIA), Power-
saving operating modes, and Peripheral Pin Select (PPS), offer flexible solutions for a wide variety of
custom applications.
Core Features
C Compiler Optimized RISC Architecture
Only 50 Instructions
Operating Speed:
– DC – 32 MHz clock input
– 125 ns minimum instruction cycle
Interrupt Capability
16-Level Deep Hardware Stack
Timers:
– Up to two 24-bit timers
– Up to four 8-bit timers
– Up to four 16-bit timers
Low-Current Power-on Reset (POR)
Configurable Power-up Timer (PWRT)
Brown-out Reset (BOR)
Low-Power BOR (LPBOR) Option
Windowed Watchdog Timer (WWDT):
– Variable prescaler selection
– Variable window size selection
– Configurable in hardware (Configuration Words) and/or software
Programmable Code Protection
Memory
Up to 28 KB Program Flash Memory
Up to 2 KB Data SRAM Memory
©
2018 Microchip Technology Inc.
Datasheet Preliminary
DS40002038B-page 1
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