MC100ES6221TB datasheet, PDF - EEWORLD Datasheet

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MC100ES6221TB: DescriptionIC CLK BUFFER 2:20 2GHZ 52LQFP; Categorylogic logic; File Size299KB，12 Pages; ManufacturerNXP; Websitehttps://www.nxp.com

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MC100ES6221TB Overview

IC CLK BUFFER 2:20 2GHZ 52LQFP

MC100ES6221TB Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	NXP
Parts packaging code	QFP
package instruction	LQFP-52
Contacts	52
Reach Compliance Code	not_compliant
Other features	ECL MODE: VCC = 0V WITH VEE = -2.5V OR -3.3V SUPPLY; ALSO OPERATES AT 3.3V SUPPLY
series	100E
Input adjustment	DIFFERENTIAL MUX
JESD-30 code	S-PQFP-G52
JESD-609 code	e0
length	10 mm
Logic integrated circuit type	LOW SKEW CLOCK DRIVER
Humidity sensitivity level	3
Number of functions	1
Number of inverted outputs
Number of terminals	52
Actual output times	20
Package body material	PLASTIC/EPOXY
encapsulated code	HLQFP
Encapsulate equivalent code	QFP52,.47SQ
Package shape	SQUARE
Package form	FLATPACK, HEAT SINK/SLUG, LOW PROFILE
Peak Reflow Temperature (Celsius)	220
power supply	-2.5/-3.3/2.5/3.3 V
propagation delay (tpd)	0.95 ns
Certification status	Not Qualified
Same Edge Skew-Max（tskwd）	0.1 ns
Maximum seat height	1.7 mm
Maximum supply voltage (Vsup)	2.625 V
Minimum supply voltage (Vsup)	2.375 V
Nominal supply voltage (Vsup)	2.5 V
surface mount	YES
technology	ECL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	30
width	10 mm

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Freescale Semiconductor

Technical Data

MC100ES6221

Rev 5, 04/2005

Low Voltage 1:20 Differential

ECL/PECL/HSTL Clock Fanout Buffer

The MC100ES6221 is a bipolar monolithic differential clock fanout buffer.

Designed for most demanding clock distribution systems, the MC100ES6221

supports various applications that require the distribution of precisely aligned

differential clock signals. Using SiGe technology and a fully differential

architecture, the device offers very low skew outputs and superior digital signal

characteristics. Target applications for this clock driver is high performance clock

distribution in computing, networking and telecommunication systems.

Features

•

1:20 differential clock fanout buffer

100 ps maximum device skew

SiGe technology

Supports DC to 2 GHz operation of clock or data signals

ECL/PECL compatible differential clock outputs

ECL/PECL/HSTL compatible differential clock inputs

Single 3.3 V, –3.3 V, 2.5 V or –2.5 V supply

Standard 52 lead LQFP package with exposed pad for enhanced thermal

characteristics

Supports industrial temperature range

Pin and function compatible to the MC100EP221

52-lead Pb-free Package Available

MC100ES6221

LOW VOLTAGE DUAL

1:20 DIFFERENTIAL ECL/PECL/HSTL

CLOCK FANOUT BUFFER

TB SUFFIX

52-LEAD LQFP PACKAGE

EXPOSED PAD

CASE 1336A-01

Functional Description

AE SUFFIX

52-LEAD LQFP PACKAGE

Pb-FREE PACKAGE

CASE 1336A-01

The MC100ES6221 is designed for low skew clock distribution systems and

supports clock frequencies up to 2 GHz. The device accepts two clock sources.

The CLK0 input can be driven by ECL or PECL compatible signals, the CLK1 input accepts HSTL compatible signals. The

selected input signal is distributed to 20 identical, differential ECL/PECL outputs. If V

is connected to the CLK0 or CLK1 input

and bypassed to GND by a 10 nF capacitor, the MC100ES6221 can be driven by single-ended ECL/PECL signals utilizing the

bias voltage output.

In order to meet the tight skew specification of the device, both outputs of a differential output pair should be terminated, even

if only one output is used. In the case where not all ten outputs are used, the output pairs on the same package side as the parts

being used on that side should be terminated.

The MC100ES6221 can be operated from a single 3.3 V or 2.5 V supply. As most other ECL compatible devices, the

MC100ES6221 supports positive (PECL) and negative (ECL) supplies. The MC100ES6221 is pin and function compatible to the

MC100EP221.

MC100ES6221TB Related Products

	MC100ES6221TB
Description	IC CLK BUFFER 2:20 2GHZ 52LQFP
Is it Rohs certified?	incompatible
Maker	NXP
Parts packaging code	QFP
package instruction	LQFP-52
Contacts	52
Reach Compliance Code	not_compliant
Other features	ECL MODE: VCC = 0V WITH VEE = -2.5V OR -3.3V SUPPLY; ALSO OPERATES AT 3.3V SUPPLY
series	100E
Input adjustment	DIFFERENTIAL MUX
JESD-30 code	S-PQFP-G52
JESD-609 code	e0
length	10 mm
Logic integrated circuit type	LOW SKEW CLOCK DRIVER
Humidity sensitivity level	3
Number of functions	1
Number of terminals	52
Actual output times	20
Package body material	PLASTIC/EPOXY
encapsulated code	HLQFP
Encapsulate equivalent code	QFP52,.47SQ
Package shape	SQUARE
Package form	FLATPACK, HEAT SINK/SLUG, LOW PROFILE
Peak Reflow Temperature (Celsius)	220
power supply	-2.5/-3.3/2.5/3.3 V
propagation delay (tpd)	0.95 ns
Certification status	Not Qualified
Same Edge Skew-Max（tskwd）	0.1 ns
Maximum seat height	1.7 mm
Maximum supply voltage (Vsup)	2.625 V
Minimum supply voltage (Vsup)	2.375 V
Nominal supply voltage (Vsup)	2.5 V
surface mount	YES
technology	ECL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	30
width	10 mm

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