Freescale Semiconductor
Data Sheet: Product Preview
Document Number: MC33493
Rev. 1.7, 03/2007
MC33493
PLL Tuned UHF Transmitter
for Data Transfer
Applications
•
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•
•
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•
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Selectable frequency bands:
315—434 MHz and 868—928 MHz
OOK and FSK modulation
Adjustable output power range
Fully integrated voltage control oscillator (VCO)
Supply voltage range: 1.9—3.6 V
Very low standby current: 0.1 nA @ T
A
= 25
°C
Low-supply voltage shutdown
Data clock output for microcontroller
Extended temperature range: –40 to 125
°C
Low external component count
Typical application compliant with European
Telecommunications Standards Institute (ETSI)
standard
PIN CONNECTIONS
DATACLK
DATA
BAND
GND
XTAL1
XTAL0
REXT
1
2
3
4
5
6
7
14
13
12
11
10
9
8
MODE
ENABLE
VCC
GNDRF
RFOUT
VCC
CFSK
Ordering Information
Ambient
Temperature
Range
Device
Package
MC33493DTB –40°C to 125°C TSSOP14
MC3493DTBE –40°C to 125°C TSSOP14
(ROHS)
This document contains information on a product under development. Freescale reserves the
right to change or discontinue this product without notice.
© Freescale Semiconductor, Inc., 2007. All rights reserved.
Transmitter Functional Description . . . . . . . . . . . . . . . . . . . . . .4
Phase Locked Loop and Local Oscillator . . . . . . . . . . . . . . . . .4
Radio Frequency (RF) Output Stage . . . . . . . . . . . . . . . . . . . .4
Modulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
Microcontroller Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
State Machine. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
Power Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
Data Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
RF Output Spectrum. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
Output Power Measurement . . . . . . . . . . . . . . . . . . . . . . . . . .14
Complete Application Schematic and
PCB for OOK Modulation . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
13 Complete Application Schematic and
PCB for FSK Modulation. . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
14 Recommendations for FSK Modulation . . . . . . . . . . . . . . . . .19
15 Case Outline Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
1
2
3
4
5
6
7
8
9
10
11
12
Figure 9. Output Power Measurement Configurations . . . . . . . .
Figure 10.Output Model and Matching Network
for 434 MHz Band . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 11.Output Power at 434 MHz Band vs Rext Value . . . . .
Figure 12.Application Schematic for OOK Modulation,
434 MHz Frequency Band . . . . . . . . . . . . . . . . . . . . . .
Figure 13.Two-Button Keyfob Board Layout . . . . . . . . . . . . . . . .
Figure 14.Application Schematic for FSK Modulation,
Serial Configuration, 434 MHz Frequency Band . . . . .
Figure 15.Application PCB Layout for FSK Modulation,
Serial Configuration, 434 MHz Frequency Band . . . . .
Figure 16.Crystal Load Capacitance Contributors Schematic . .
Figure 17.Case Outline Dimensions . . . . . . . . . . . . . . . . . . . . .
13
13
14
15
16
17
18
19
20
List of Tables
Pin Function Description . . . . . . . . . . . . . . . . . . . . . . . . 3
Absolute Maximum Ratings. . . . . . . . . . . . . . . . . . . . . . 3
Band Selection and Associated Divider Ratios . . . . . . . 4
DATACLK Frequency vs Crystal Oscillator Frequency. . 5
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 8
External Components Description for OOK. . . . . . . . . 15
Typical Crystal Characteristics (SMD Package) . . . . . 16
External Components Description for FSK . . . . . . . . . 17
Crystal Pulling Capacitor Values vs
Carrier Frequency Total Deviation -1- . . . . . . . . . . . . . 18
Table 10.Crystal Pulling Capacitor Values vs
Carrier Frequency Total Deviation -2- . . . . . . . . . . . . . 18
Table 11.Pads and Tracks Parasitic Values . . . . . . . . . . . . . . . . 19
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
List of Figures
Figure 1. Simplified Block Diagram . . . . . . . . . . . . . . . . . . . . . . . 3
Figure 2. Crystal Pulling Configurations. . . . . . . . . . . . . . . . . . . . 5
Figure 3. State machine . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 4. Signals Waveform and Timing Definition . . . . . . . . . . . 7
Figure 5. RF Spectrum at 434 MHz Frequency Band
Displayed with a 5 MHz Span . . . . . . . . . . . . . . . . . . . 11
Figure 6. RF Spectrum at 434 MHz Frequency Band
Displayed with a 50 MHz Span . . . . . . . . . . . . . . . . . . 11
Figure 7. RF Spectrum at 434 MHz Frequency Band
Displayed with a 1.5 GHz Span . . . . . . . . . . . . . . . . . 12
Figure 8. RF Spectrum at 434 MHz Band
for a 70 kHz FSK Deviation at 4.8 kbit/s . . . . . . . . . . . 12
PLL Tuned UHF Transmitter for Data Transfer Applications, Rev. 1.7
2
Freescale Semiconductor
Figure 1. Simplified Block Diagram
Table 1. Pin Function Description
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Name
DATACLK
DATA
BAND
GND
XTAL1
XTAL0
REXT
CFSK
VCC
RFOUT
GNDRF
VCC
ENABLE
MODE
Description
Clock output to the microcontroller
Data input
Frequency band selection
Ground
Reference oscillator input
Reference oscillator output
Power amplifier output current setting input
FSK switch output
Power supply
Power amplifier output
Power amplifier ground
Power supply
Enable input
Modulation type selection input
Table 2. Absolute Maximum Ratings
Parameter
Supply voltage
Voltage allowed on each pin
ESD HBM voltage capability on each pin
1
(note 1)
ESD MM voltage capability on each pin
2
(note 2)
Storage temperature
Junction temperature
1
2
Symbol
V
CC
Value
V
GND
– 0.3 to 3.7
V
GND
– 0.3
to V
CC
+ 0.3
±2000
±150
Unit
V
V
V
V
°C
°C
Ts
Tj
–65 to +150
+150
Human Body model, AEC-Q100-002 Rev. C.
Machine Model, AEC-Q100-003 Rev. E.
PLL Tuned UHF Transmitter for Data Transfer Applications, Rev. 1.7
Freescale Semiconductor
3
Transmitter Functional Description
1
Transmitter Functional Description
MC33493 is a PLL-tuned low-power UHF transmitter. The different modes of operation are controlled by the microcontroller
through several digital input pins. The power supply voltage ranges from 1.9 V to 3.6 V, allowing operation with a single lithium
cell.
2
Phase Locked Loop and Local Oscillator
The VCO is a completely integrated relaxation oscillator. The phase frequency detector (PFD) and the loop filter are fully
integrated. The exact output frequency is equal to: f
RFOUT
= f
XTAL
×
[PLL divider ratio]. The frequency band of operation is
selected through the BAND pin.
Table 3
shows details for each frequency band selection.
Table 3. Band Selection and Associated Divider Ratios
BAND Input Level
High
Low
Frequency Band
(MHz)
315
434
868
PLL Divider Ratio
32
64
Crystal Oscillator
Frequency (MHz)
9.84
13.56
An out-of-lock function is performed by monitoring the PFD output voltage. When it exceeds defined limits, the RF output stage
is disabled.
3
Radio Frequency (RF) Output Stage
The radio frequentcy (RF) output stage source is a single-ended square-wave switched current. Harmonics are present in the
output current drive. Their radiated absolute level depends on the antenna characteristics and output power. Typical application
demonstrates compliance to ETSI standard.
A resistor, R
ext
, connected to the REXT pin controls the output power allowing a trade-off between radiated power and current
consumption.
The output voltage is internally clamped to V
cc
±
2 V
be
(typ. V
cc
±
1.5 V @ T
A
=25
°C).
4
Modulation
DATA = 0
→
output stage off,
DATA = 1
→
output stage on.
To select the On Off Keying (OOK) modulation, a low-logic level must be applied on the MODE pin. This modulation is
performed by switching the RF output stage on or off. The logic level applied on the DATA pin controls the output stage state:
Applying a high-logic level on the MODE pin selects Frequency Shift Keying (FSK) modulation. This modulation is achieved
by crystal pulling. An internal switch connected to the CFSK pin enables switching the external crystal load capacitors.
Figure 2
shows the possible configurations: serial and parallel.
The logic level applied on pin DATA controls the state of this internal switch:
DATA=0
→
switch off,
DATA=1
→
switch on.
DATA input is internally re-synchronized by the crystal reference signal. The corresponding jitter on the data duty cycle cannot
exceed
±1
reference period (±75 ns for a 13.56 MHz crystal).
This crystal pulling solution implies that the RF output frequency deviation equals the crystal frequency deviation multiplied
by the PLL Divider ratio (see
Table 3).
PLL Tuned UHF Transmitter for Data Transfer Applications, Rev. 1.7
4
Freescale Semiconductor
Microcontroller Interface
Figure 2. Crystal Pulling Configurations
5
Microcontroller Interface
Four digital input pins (ENABLE, DATA, BAND, and MODE) enable the circuit to be controlled by a microcontroller. The
band frequency and the modulation type should be configured before enabling the circuit.
One digital output pin, DATACLK, provides the microcontroller with a reference frequency for data clocking. This frequency
is equal to the crystal oscillator frequency divided by 64 (see
Table 4).
Table 4. DATACLK Frequency vs Crystal Oscillator Frequency
Crystal Oscillator Frequency (MHz)
9.84
13.56
DATACLK Frequency (kHz)
154
212
PLL Tuned UHF Transmitter for Data Transfer Applications, Rev. 1.7
Freescale Semiconductor
5
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