Integrated Communications Processors
MPC860 PowerQUICC
™
Family
Freescale Semiconductor’s PowerQUICC™
MPC860 family is designed to deliver a
versatile, on-chip integrated processor and
peripheral combination that can be used in
a variety of controller applications—excelling
particularly in communications and networking
products. Providing functionality beyond
the MPC850 family, the MPC860 family
and MPC855T derivative are engineered
to provide higher performance in all areas
of device operation including flexibility,
extensions in capability and integration.
The MPC860 architecture integrates two
processing blocks: the embedded 8xx core
compatible with the Power Architecture™
technology instruction-set architecture (ISA),
and the communications processor module
(CPM). The CPM is a dedicated RISC-based
communications engine designed to support
four serial communications controllers (SCCs),
providing a total of eight serial channels: four
SCCs, two serial management controllers
(SMCs), one serial peripheral interface (SPI)
and one I
2
C interface. This dual-processor
architecture is designed to provide superior
performance over traditional architectures
because the CPM offloads communications
intensive processing from the embedded 8xx
core. This partitioning frees up the 8xx core to
perform other system functions.
SCC1
SCC2
SCC3
SCC4
MPC860 Block Diagram
4 KB or 16 KB
I-Cache
Instruction
Bus
Embedded
8xx
Core
4 KB or 8 KB
D-Cache
Load/Store
Bus
Fast Ethernet
Controller
DMAs
FIFOs
10/100 Base-T
Media Access
Control
MII
Parallel I/O
Baud Rate
Generators
Parallel
Port Pins
Four
Timers
Interrupt
Control
Dual-Port
RAM
Virtual IDMA
and
16 Serial DMA
D-MMU
I-MMU
Unified Bus
System Interface Unit
Memory Controller
Bus Interface Unit
System Functions
Real-Time Clock
PCMCIA Interface
32-bit Controller
and Program ROM
Timer
SMC1
SMC2
SPI
I
2
C
Time Slot Assigner
Serial Interface
Key Features
• Power Architecture Technology
Embedded 8xx core
• 4 KB instruction cache and 4 KB data
cache (16 KB instruction cache and
8 KB data cache available) in MPC860P
and MPC860DP
• Powerful memory controller and
system functions
• Efficient architecture that involves
a separate RISC processor (CPM) for
handling communications
• Up to four serial communications
controllers (SCC)
• Support for Ethernet, Fast Ethernet,
HDLC, asynchronous transfer mode (ATM)
and more
• Two SMCs, one SPI and one I
2
C
• Additional support features, including
timers, baud rate generators, etc.
• 8K dual-port RAM
• Available at 50, 66 and 80 MHz in a
357-pin RoHS compliant PBGA package
• Strong third-party tool support through
Freescale’s Design Alliance Program
MPC
860
EN
C
Temp. Range
None=0ºC Ta to +95ºC Tj
C=-40ºC Ta to +95ºC Tj
VR
66
Frequency
MHz
D
Die Mask
Revision
800 Series Device Number
(850, 860, etc.)
Product Code
KMPC Sample Pack (2 units)
MPC Fully Qualified
Part/Module Modifier
DE Dual Channel (Ethernet)
DT Dual Channel
(10/100, Multi-HDLC, ATM)
DP Dual Channel
(16K I-Cache and 8K D-Cache,
10/100, Multi-HDLC, ATM)
EN Four Channel (Ethernet)
SR Four Channel
(Ethernet, Multi-HDLC, ATM)
T Four Channel
(10/100, Multi-HDLC, ATM)
P Four Channel
(16K I-Cache and 8K D-Cache,
10/100, Multi-HDLC, ATM)
Package
VR=RoHS compliant
(Pb-free) 357 PBGA
ZQ=357 PBGA
855T
Serial Communications Controllers (SCCs)
I-Cache (KB)
D-Cache (KB)
Ethernet (10T)
Ethernet (10/100)
ATM
Multi-channel HDLC
1
4
4
1
1
Yes
Up to 32
860DE
2
4
4
2
-
-
-
860DT
2
4
4
2
1
Yes
Up to 64
860DP
2
16
8
2
1
Yes
Up to 64
860EN
4
4
4
4
-
-
-
860SR
4
4
4
4
-
Yes
Up to 64
860T
4
4
4
4
1
Yes
Up to 64
860P
4
16
8
4
1
Yes
Up to 64
Technical Specifications
• Embedded 8xx core designed to provide
106 MIPS (using Dhrystone 2.1) at 80 MHz
Single-issue, 32-bit version of the
embedded 8xx core with 32- x 32-bit
fixed point registers
4 KB instruction cache and 4 KB data
cache (16 KB instruction cache and 8 KB
data cache available in 860P and 860DP)
Memory management units with 32-entry
TLBs and fully associative instruction and
data TLBs
• Advanced on-chip emulation debug mode
• Data bus dynamic bus sizing for 8-, 16- and
32-bit buses
• Communications processor module
8 KB dual-port RAM
Up to four serial communications
controllers (SCCs)
32-bit scaler RISC controller
Two serial management controllers
16 serial DMA (SDMA) channels
One I
2
C port
One serial peripheral interface
Four general-purpose timers
Time slot assigner
Interrupts
Four baud rate generators
Protocols supported
·· Ethernet IEEE
®
802.3 and Fast Ethernet
·· ATM
·· HDLC
·· Asynchronous HDLC
·· Channelized HDLC
·· Multi-channel HDLC
·· Appletalk
®
·· UART
·· IrDA
·· Basic rate ISDN (BRI)
·· Primary rate ISDN (PRI)
·· Totally transparent mode with/
without CRC
• System integration unit
Memory controller
Real-time clock
PCMCIA interface
System functions
Bus interface unit
Learn More:
For current information about Freescale
products and documentation, please visit
www.freescale.com.
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service
names are the property of their respective owners. The Power Architecture and Power.org word marks and the Power
and Power.org logos and related marks are trademarks and service marks licensed by Power.org.
© Freescale Semiconductor, Inc. 2007
Document Number: MPC860FACT
REV 10
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