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74HCT4053D

Description
X34 PB-F 74HC CMOS LOGIC IC SERI
CategoryAnalog mixed-signal IC    The signal circuit   
File Size241KB,11 Pages
ManufacturerToshiba Semiconductor
Websitehttp://toshiba-semicon-storage.com/
Environmental Compliance
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74HCT4053D Overview

X34 PB-F 74HC CMOS LOGIC IC SERI

74HCT4053D Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerToshiba Semiconductor
package instruction,
Reach Compliance Codeunknown
Factory Lead Time12 weeks
Analog Integrated Circuits - Other TypesSINGLE-ENDED MULTIPLEXER
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Maximum time at peak reflow temperatureNOT SPECIFIED
Base Number Matches1
74HCT4053D
CMOS Digital Integrated Circuits Silicon Monolithic
74HCT4053D
1. Functional Description
Triple 2-Channel Analog Multiplexer/Demultiplexer
2. General
The 74HCT4053D are high speed CMOS ANALOG MULTIPLEXER/DEMULTIPLEXER fabricated with silicon
gate C
2
MOS technology. They achieve the high speed operation similar to equivalent LSTTL while maintaining
the CMOS low power dissipation.
This device may be used as a level converter for interfacing TTL or NMOS to High Speed CMOS. This inputs
are compatible with TTL, NMOS and CMOS output voltage levels.
The 74HCT4053D has a 2 channel
×
3 configuration.
The digital signal to the control terminal turns "ON" the corresponding switch of each channel a large amplitude
signal (V
CC
- V
EE
) can then be switched by the small logical amplitude (V
CC
- GND) control signal.
For example, in the case of V
CC
= 5 V, GND = 0 V, V
EE
= -5 V, signals between -5 V and +5 V can be switched
from the logical circuit with a single power supply of 5 V. As the ON-resistance of each switch is low, they can be
connected to circuits with low input impedance.
All inputs are equipped with protection circuits against static discharge or transient excess voltage.
3. Features
(1)
(2)
(3)
(4)
(5)
(6)
Low power dissipation: I
CC
= 4.0
µA
(max) (V
CC
= 5.5 V, V
EE
= GND, T
a
= 25
)
Compatible with TTL output: V
IH
= 2.0 V (min), V
IL
= 0.8 V (max)
Wide interfacing ability: LSTTL, NMOS, CMOS
Low ON-resistance: R
ON
= 50
(typ.) at V
CC
- V
EE
= 9 V
High noise immunity: THD = 0.020 % (typ.) at V
CC
- V
EE
= 9 V
Pin and function compatible with 4053B
4. Packaging
SOIC16
Start of commercial production
©2016 Toshiba Corporation
1
2016-08
2016-09-12
Rev.1.0
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