TEMPSENSE Voltage....................... –0.3V to V
DD
+ 0.5V
CHARGECFG2,
CHARGECFG1 Voltage..................... –0.3V to V
DD
+ 0.5V
Operating Junction Temperature Range
LT8490E (Notes 1, 3) ......................... –40°C to 125°C
LT8490I (Notes 1, 3) .......................... –40°C to 125°C
Storage Temperature Range ................. –65°C to 150°C
FBIR 1
FAULT 2
TEMPSENSE 3
V
DD
4
FBOW 5
FBIW 6
INTV
CC
7
SWEN 8
MODE 9
IMON_IN 10
SHDN
11
CSN 12
CSP 13
LDO33 14
FBIN 15
FBOUT 16
IMON_OUT 17
V
C
18
SS 19
CLKOUT 20
52 NC
51 STATUS
50 IOW
49 SWENO
48 ECON
46 V
IN
45 CSPIN
44 CSNIN
65
GND
42 CSPOUT
41 CSNOUT
40 EXTV
CC
38 SRVO_FBOUT
37 SRVO_IOUT
36 SRVO_IIN
35 SRVO_FBIN
33 BOOST1
SYNC 21
RT 22
BG1 23
GATEV
CC
24
BG2 25
BOOST2 27
TG2 28
SW2 29
UKJ PACKAGE
64-LEAD (7mm × 11mm) PLASTIC QFN
T
JMAX
= 125°C,
θ
JA
= 34°C/W
EXPOSED PAD (PIN 65) IS GND, MUST BE SOLDERED TO PCB
orDer inForMaTion
LEAD FREE FINISH
LT8490EUKJ#PBF
LT8490IUKJ#PBF
TAPE AND REEL
LT8490EUKJ#TRPBF
LT8490IUKJ#TRPBF
PART MARKING*
LT8490UKJ
LT8490UKJ
PACKAGE DESCRIPTION
64-Lead (7mm × 11mm) Plastic QFN
64-Lead (7mm × 11mm) Plastic QFN
TEMPERATURE RANGE
–40°C to 125°C
–40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to:
http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to:
http://www.linear.com/tapeandreel/.
Some packages are available in 500 unit reels through
designated sales channels with #TRMPBF suffix.
SW1 31
TG1 32
2
8490fa
For more information
www.linear.com/LT8490
LT8490
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
IN
= 12V, V
DD
= AV
DD
= 3.3V,
SHDN
= 3V unless otherwise noted. (Note 3)
PARAMETER
Voltage Supply and Regulators
V
IN
Operating Voltage Range (Note 7)
V
IN
Quiescent Current
V
IN
Quiescent Current in Shutdown
V
DD
Quiescent Current
EXTV
CC
Switchover Voltage
EXTV
CC
Switchover Hysteresis
LDO33 Pin Voltage
LDO33 Pin Load Regulation
LDO33 Pin Current Limit
LDO33 Pin Undervoltage Lockout
LDO33 Pin Undervoltage Lockout Hysteresis
Switching Regulator Control
SHDN
Input Voltage High
SHDN
Input Voltage High Hysteresis
SHDN
Input Voltage Low
SHDN
Pin Bias Current
SWEN Rising Threshold Voltage
SWEN Threshold Voltage Hysteresis
MODE Pin Thresholds
IMON_OUT Rising threshold for CCM Operation
IMON_OUT Falling threshold for DCM
Voltage Regulation
Regulation Voltage for FBOUT
Regulation Voltage for FBIN
FBOUT Pin Bias Current
FBIN Pin Bias Current
Current Regulation
Regulation Voltage for IMON_IN and IMON_OUT
IMON_IN Output Current
V
C
= 1.2V, EXTV
CC
= 0V
V
CSPIN
– V
CSNIN
= 50mV, V
CSPIN
= 5.025V
V
CSPIN
– V
CSNIN
= 50mV, V
CSPIN
= 5.025V
V
CSPIN
– V
CSNIN
= 0mV, V
CSPIN
= 5V
V
CSPOUT
– V
CSNOUT
= 50mV, V
CSPOUT
= 5.025V
V
CSPOUT
– V
CSNOUT
= 50mV, V
CSPOUT
= 5.025V
V
CSPOUT
– V
CSNOUT
= 5mV, V
CSPOUT
= 5.0025V
V
CSPOUT
– V
CSNOUT
= 5mV, V
CSPOUT
= 5.0025V
l
l
l
l
l
l
l
l
elecTrical characTerisTics
CONDITIONS
MIN
6
TYP
MAX
80
UNITS
V
mA
µA
mA
V
V
V
%
mA
V
mV
V
mV
V
µA
µA
V
mV
V
V
mV
mV
V
V
nA
nA
V
µA
µA
µA
V
µA
µA
µA
µA
V
Not Switching, V
EXTVCC
= 0, V
DD
= AV
DD
= Float
V
SHDN
= 0V
I
AVDD
+ I
VDD
, V
DD
= AV
DD
= 3.3V
I
INTVCC
= 20mA, V
EXTVCC
Rising
5mA from LDO33 Pin
I
LDO33
= 0.1mA to 5mA
l
l
l
2.65
0
2.5
6.15
3.23
12
2.96
4
6.4
0.18
l
4.2
1
6.5
6.6
3.35
–1
22
3.12
3.295
–0.25
17.25
3.04
35
LDO33 Falling
SHDN
Rising to Enable the Device
Device Disabled, Low Quiescent Current
V
SHDN
= 3V
V
SHDN
= 12V
l
1.184 1.234 1.284
50
0.35
0
11
1
22
l
l
1.156 1.206 1.256
22
2.3
195
122
224
150
Discontinuous Mode
Forced Continuous Mode
MODE = 0V
MODE = 0V
V
C
= 1.2V, EXTV
CC
= 0V
V
C
= 1.2V, EXTV
CC
= 0V
Current Out of Pin
Current Out of Pin
l
l
l
l
0.4
168
95
l
l
1.193 1.207 1.222
1.184 1.205 1.226
15
10
1.187 1.208 1.229
54
53
2.5
1.55
47.5
47
3.25
2.75
1.55
57
57
7
1.61
50
50
5
5
1.61
60
61
11.5
1.67
52.5
54.25
6.75
8
1.67
IMON_IN Overvoltage Threshold
IMON_OUT Output Current
IMON_OUT Overvoltage Threshold
8490fa
For more information
www.linear.com/LT8490
3
LT8490
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
IN
= 12V, V
DD
= AV
DD
= 3.3V,
SHDN
= 3V unless otherwise noted. (Note 3)
PARAMETER
Switching Regulator Oscillator (OSC1)
Switch Frequency Range
Switching Frequency, f
OSC
SYNC High Level for Synchronization
SYNC Low Level for Synchronization
SYNC Clock Pulse Duty Cycle
Recommended Min SYNC Ratio, f
SYNC
/ f
OSC
CLKOUT Output Voltage HIGH
CLKOUT Output Voltage LOW
CLKOUT Duty Cycle
1mA Out of CLKOUT Pin
1mA into CLKOUT Pin
T
J
= –40°C
T
J
= 25°C
T
J
= 125°C
I
OL
= 5mA
I
OH
= –5mA
I
OL
= 0.5mA
I
OH
= –0.1mA
VINR Pin Falling
VINR Pin
Not in Power Supply Mode
Low Power Mode Enabled
Low Power Mode Disabled
IOR Rising
g
ECON Rising
IOR Falling
g
ECON Falling
Temperature Compensation Enabled
Temperature Compensation Disabled
Wide Valid Temperature Range
Narrow Valid Temperature Range
l
l
l
l
l
l
l
l
l
l
l
l
l
l
elecTrical characTerisTics
CONDITIONS
Syncing or Free Running
R
T
= 365k
R
T
= 215k
R
T
= 124k
l
l
l
l
l
MIN
100
102
170
310
1.3
TYP
MAX
400
UNITS
kHz
kHz
kHz
kHz
V
V
%
V
mV
%
%
%
120
202
350
142
235
400
0.5
V
SYNC
= 0V to 2V
20
3/4
2.3
2.45
25
22.7
44.1
77
0.22
2.7
3.0
0.1
1.7
155
2.2
174
29
380
213
168
95
94
4
94
4
94.5
9
4.25
395
225
195
122
95
5
95
5
96
10
5
31.25
8
l
80
2.55
100
Charging Control
STATUS, FBOW, FBIW, SWENO, IOW,
ECON Output Low Voltage
STATUS, FBOW, FBIW, SWENO, IOW,
ECON Output High Voltage
FAULT Output Voltage Low
FAULT Output Voltage High
Power Supply Mode Detection Threshold (Note 6)
Power Supply Mode Detection Threshold Hysteresis (Note 6)
Minimum VINR Voltage for Start-Up (Note 6)
0.5
V
V
0.25
V
V
mV
mV
410
237
224
150
96
6
96
6
97.5
11
5.75
mV
mV
mV
mV
%
%
%
%
%
mV
mV
kHz
Bits
2640
Baud
Bits
8490fa
High Charging Current Threshold on IOR (Note 6)
Low Charging Current Threshold on IOR (Note 6)
Minimum CHARGECFG1 % of AV
DD
to Disable Stage 3
(Note 6)
Maximum CHARGECFG1 % of AV
DD
to Disable Stage 3
(Note 6)
Minimum CHARGECFG2 % of AV
DD
to Disable Time Limits
(Note 6)
Maximum CHARGECFG2 % of AV
DD
to Disable Time Limits
(Note 6)
Minimum TEMPSENSE % of AV
DD
to Detect Battery Disconnected
(Note 6)
V
CSPOUT
– V
CSNOUT
Threshold for C/5 Detection (Note 6)
V
CSPOUT
– V
CSNOUT
Threshold for C/10 Detection (Note 6)
FBIW, FBOW PWM Frequency (OSC2)
FBIW, FBOW PWM Resolution
STATUS UART Bit Rate
Internal A/D Resolution
V
CSxOUT
Common Mode = 5.0V, R
TOTAL
from
IMON_OUT to Ground = 24.3kΩ
V
CSxOUT
Common Mode = 5.0V, IOR Falling,
R
TOTAL
from IMON_OUT to Ground = 24.3kΩ
2160
2400
10
4
For more information
www.linear.com/LT8490
LT8490
elecTrical characTerisTics
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
Do not force voltage on the V
C
pin.
Note 3:
The LT8490E is guaranteed to meet performance specifications from
0°C to 125°C junction temperature. Specifications over the –40°C to 125°C
operating junction temperature range are assured by design, characterization
and correlation with statistical process controls. The LT8490I is guaranteed
over the full –40°C to 125°C junction temperature range.
Note 4:
Do not apply a voltage or current source to these pins. They must
be connected to capacitive loads only, otherwise permanent damage may
occur.
Note 5:
Negative voltages on the SW1 and SW2 pins are limited in the
applications by the body diodes of the external NMOS devices M2 and
M3 or parallel Schottky diodes when present. The SW1 and SW2 pins
are tolerant of these negative voltages in excess of one diode drop below
ground, guaranteed by design.
Note 6:
These thresholds are measured by the internal A-D converter. The
A-D reference voltage is AV
DD
. AV
DD
, V
DD
and an additional 2.8mA load are
regulated by LDO33 to create the AV
DD
reference for these measurements.
The absolute threshold voltages will shift with corresponding changes in
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