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ATTINY4-TS8R

Description
IC MCU 8BIT 512B FLASH SOT23
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size3MB,173 Pages
ManufacturerMicrochip
Websitehttps://www.microchip.com
Environmental Compliance
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ATTINY4-TS8R Overview

IC MCU 8BIT 512B FLASH SOT23

ATTINY4-TS8R Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
package instructionLSSOP, TSOP6,.11,37
Reach Compliance Codecompliant
Factory Lead Time15 weeks
Has ADCNO
Address bus width
bit size8
CPU seriesAVR RISC
maximum clock frequency12 MHz
DAC channelNO
DMA channelNO
External data bus width
JESD-30 codeR-PDSO-G6
length2.9 mm
Number of I/O lines4
Number of terminals6
On-chip program ROM width8
Maximum operating temperature125 °C
Minimum operating temperature-40 °C
PWM channelYES
Package body materialPLASTIC/EPOXY
encapsulated codeLSSOP
Encapsulate equivalent codeTSOP6,.11,37
Package shapeRECTANGULAR
Package formSMALL OUTLINE, LOW PROFILE, SHRINK PITCH
power supply2/5 V
Certification statusNot Qualified
RAM (bytes)32
rom(word)512
ROM programmabilityFLASH
Maximum seat height1.45 mm
speed10 MHz
Maximum slew rate5 mA
Maximum supply voltage5.5 V
Minimum supply voltage1.8 V
Nominal supply voltage3 V
surface mountYES
technologyCMOS
Temperature levelAUTOMOTIVE
Terminal formGULL WING
Terminal pitch0.95 mm
Terminal locationDUAL
width1.6 mm
uPs/uCs/peripheral integrated circuit typeMICROCONTROLLER, RISC
Base Number Matches1
ATtiny4/5/9/10
tinyAVR
®
Data Sheet
Introduction
The ATtiny4/5/9/10 is a low power, CMOS 8-bit microcontrollers based on the AVR
®
enhanced RISC archi-
tecture. The ATtiny4/5/9/10 is a 6/8-pins device ranging from 512 Bytes to 1024 Bytes Flash, with 32 Bytes
SRAM. By executing instructions in a single clock cycle, the devices achieve CPU throughput approaching
one million instructions per second (MIPS) per megahertz, allowing the system designer to optimize power
consumption versus processing speed.
Features
High Performance, Low Power AVR
®
8-Bit Microcontroller
Advanced RISC Architecture
– 54 Powerful Instructions – Most Single Clock Cycle Execution
– 16 x 8 General Purpose Working Registers
– Fully Static Operation
– Up to 12 MIPS Throughput at 12 MHz
Non-volatile Program and Data Memories
– 512/1024 Bytes of In-System Programmable Flash Program Memory
– 32 Bytes Internal SRAM
– Flash Write/Erase Cycles: 10,000
– Data Retention: 20 Years at 85C / 100 Years at 25C
Peripheral Features
– QTouch
®
Library Support for Capacitive Touch Sensing (1 Channel)
– One 16-bit Timer/Counter with Prescaler and Two PWM Channels
– Programmable Watchdog Timer with Separate On-chip Oscillator
– 4-channel, 8-bit Analog to Digital Converter (ATtiny5/10, only)
– On-chip Analog Comparator
Special Microcontroller Features
– In-System Programmable (at 5V, only)
– External and Internal Interrupt Sources
– Low Power Idle, ADC Noise Reduction, and Power-down Modes
– Enhanced Power-on Reset Circuit
– Programmable Supply Voltage Level Monitor with Interrupt and Reset
– Internal Calibrated Oscillator
I/O and Packages
– Four Programmable I/O Lines
– 6-pin SOT and 8-pad UDFN
2018 Microchip Technology Inc.
Data Sheet Complete
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