Datasheet
RL78/I1D
RENESAS MCU
R01DS0244EJ0220
Rev. 2.20
Feb 20, 2017
1. OUTLINE
1.1
•
•
•
•
Features
Data transfer controller (DTC)
• Transfer modes: Normal transfer mode, repeat transfer
mode, block transfer mode
• Activation sources: Activated by interrupt sources.
• Chain transfer function
V
DD
= 1.6 V to 3.6 V
HALT mode
STOP mode
SNOOZE mode
Ultra-low power consumption technology
RL78 CPU core
• CISC architecture with 3-stage pipeline
• Minimum instruction execution time: Can be changed
from high speed (0.04167
μs:
@ 24 MHz operation with
high-speed on-chip oscillator) to ultra-low speed (66.6
μs:
@ 15 kHz operation with low-speed on-chip
oscillator clock)
• Multiply/divide/multiply & accumulate instructions are
supported.
• Address space: 1 MB
• General-purpose registers: (8-bit register
×
8)
×
4 banks
• On-chip RAM: 0.7 to 3 KB
Event link controller (ELC)
• Event signals of 20 types can be linked to the specified
peripheral function.
Serial interfaces
• CSI: 2 channels
• UART: 1 channel
• I
2
C/simplified I
2
C: 2 channels
Timers
•
•
•
•
16-bit timer: 4 channels
12-bit interval timer: 1 channel
8-bit interval timer: 4 channels
Real-time clock: 1 channel (calendar for 99 years, alarm
function, and clock correction function)
• Watchdog timer: 1 channel
Code flash memory
• Code flash memory: 8 to 32 KB
• Block size: 1 KB
• Prohibition of block erase and rewriting (security
function)
• On-chip debug function
• Self-programming (with boot swap function/flash shield
window function)
A/D converter
• 8/12-bit resolution A/D converter (V
DD
= 1.6 to 3.6 V)
• Analog input: 6 to 17 channels
• Internal reference voltage (1.45 V) and temperature
sensor
Data flash memory
• Data flash memory: 2 KB
• Back ground operation (BGO): Instructions can be
executed from the program memory while rewriting the
data flash memory.
• Number of rewrites: 1,000,000 times (TYP.)
• Voltage of rewrites: V
DD
= 1.8 to 3.6 V
Comparator
• 2 channels
• Operating modes: Comparator high-speed mode,
comparator low-speed mode, window mode
Operational amplifier
• 4 channels
High-speed on-chip oscillator
• Select from 24 MHz, 16 MHz, 12 MHz, 8 MHz, 6 MHz, 4
MHz, 3 MHz, 2 MHz, and 1 MHz
• High accuracy: ±1.0% (V
DD
= 1.8 to 3.6 V, T
A
= -20 to
+85°C)
I/O ports
• I/O port: 14 to 42 (N-ch open drain I/O [withstand
voltage of 6 V]: 4, N-ch open drain I/O [V
DD
withstand
voltage]: 3 to 7)
• Can be set to N-ch open drain, TTL input buffer, and on-
chip pull-up resistor
• Different potential interface: Can connect to a 1.8/2.5 V
device
• On-chip key interrupt function
• On-chip clock output/buzzer output controller
Middle-speed on-chip oscillator
• Selectable from 4 MHz, 2 MHz, and 1 MHz.
Operating ambient temperature
• T
A
= -40 to +105°C (G: Industrial applications)
Power management and reset function
• On-chip power-on-reset (POR) circuit
• On-chip voltage detector (LVD) (Select interrupt and
reset from 12 levels)
Others
• On-chip BCD (binary-coded decimal) correction circuit
• On-chip data operation circuit
Remark
The functions mounted depend on the
product. See
1.6 Outline of Functions.
R01DS0244EJ0220 Rev. 2.20
Feb 20, 2017
Page 1 of 99
RL78/I1D
1. OUTLINE
1.2
Ordering Information
Figure 1 - 1 Part Number, Memory Size, and Package of RL78/I1D
Part No.
R 5 F 1 1 7 GCG x x x F B # U 0
Packaging specification
#20: Tray (HVQFN)
#30: Tray (LFQFP, LQFP, LSSOP)
#U0: Tray (HWQFN)
#40: Embossed Tape (HVQFN)
#50: Embossed Tape (LFQFP, LQFP, LSSOP)
#W0: Embossed Tape (HWQFN)
Package type:
SP: LSSOP, 0.65 mm pitch
FP: LQFP, 0.80 mm pitch
FB: LFQFP, 0.50 mm pitch
NA: HWQFN, 0.50 mm pitch
Note 1
NA: HVQFN, 0.50 mm pitch
Note 2
ROM number (Omitted for blank products)
Fields of application:
G: Industrial applications, T
A
= -40 to +105
°C
ROM capacity:
8: 8 KB
A: 16 KB
C: 32 KB
Pin count:
6: 20-pin
7: 24-pin
A: 30-pin
B: 32-pin
G: 48-pin
RL78/I1D
Memory type:
F : Flash memory
Renesas MCU
Renesas semiconductor product
Note 1.
Note 2.
24-pin products
32-pin products
R01DS0244EJ0220 Rev. 2.20
Feb 20, 2017
Page 3 of 99
RL78/I1D
1. OUTLINE
Pin
count
Package
Ordering Part Number
R5F11768GSP#30, R5F1176AGSP#30,
R5F11768GSP#50, R5F1176AGSP#50
R5F11778GNA#U0, R5F1177AGNA#U0,
R5F11778GNA#W0, R5F1177AGNA#W0
R5F117A8GSP#30, R5F117AAGSP#30, R5F117ACGSP#30,
R5F117A8GSP#50, R5F117AAGSP#50, R5F117ACGSP#50
R5F117BAGNA#20, R5F117BCGNA#20,
R5F117BAGNA#40, R5F117BCGNA#40
R5F117BAGFP#30, R5F117BCGFP#30,
R5F117BAGFP#50, R5F117BCGFP#50
R5F117GAGFB#30, R5F117GCGFB#30,
R5F117GAGFB#50, R5F117GCGFB#50
20 pins 20-pin plastic LSSOP
(4.4
×
6.5 mm, 0.65 mm pitch)
24 pins 24-pin plastic HWQFN
(4
×
4 mm, 0.5 mm pitch)
30 pins 30-pin plastic LSSOP
(7.62 mm (300), 0.65 mm pitch)
32 pins 32-pin plastic HVQFN
(5
×
5 mm, 0.5 mm pitch)
32-pin plastic LQFP
(7
×
7 mm, 0.8 mm pitch)
48 pins 48-pin plastic LFQFP
(7
×
7 mm, 0.5 mm pitch)
Caution
The ordering part numbers represent the numbers at the time of publication. For the latest ordering part
numbers, refer to the target product page of the Renesas Electronics website.
R01DS0244EJ0220 Rev. 2.20
Feb 20, 2017
Page 4 of 99
RL78/I1D
1. OUTLINE
1.3
1.3.1
<R>
Pin Configuration (Top View)
20-pin products
• 20-pin plastic LSSOP (4.4
×
6.5 mm, 0.65 mm pitch)
P12/ANI2/AMP0+
P40/TOOL0
RESET
P137/INTP0
P122/X2/EXCLK
P121/X1
REGC
V
SS
V
DD
P55/SI00/RxD0/SDA00/INTP2/TOOLRXD
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
P13/ANI3/AMP0-
P14/ANI4/IVCMP0/AMP0O
AV
SS
AV
DD
P22/ANI11/AMP3+
P21/ANI12/AMP3-
P20/ANI13/IVCMP1/AMP3O
P31/TI01/TO00/PCLBUZ0/IVREF1
P30/SCK00/SCL00/TI00/TO01/IVREF0
P54/SO00/TxD0/INTP1/TOOLTXD
Caution 1. Connect the REGC pin to V
SS
pin via a capacitor (0.47 to 1
μ
F).
Caution 2. Make AV
SS
pin the same potential as V
SS
pin.
Caution 3. Make AV
DD
pin the same potential as V
DD
pin.
Remark
RL78/I1D
(Top View)
For pin identification, see
1.4 Pin Identification
.
R01DS0244EJ0220 Rev. 2.20
Feb 20, 2017
Page 5 of 99
DSP and ARM Processors
京公网安备 11010802033920号
EEWORLD
